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toh:arcadyan:arv4518pw

Arcadyan ARV4518PW (SMC-7908-ISP)

Known Supported Versions

OpenWrt Versions Supported
Backfire 10.03.1 Attitude adjustment 12.09 Barrier Breaker 14.07

There are two hardware revisions. The revision is in the bottom label:

  • R01: Backfire 10.03.1, but without wifi. Doesn't work with Attitude Adjustment because nobody tested the patches. Full support since R35352.
  • R01A: Since Backfire 10.03.1.

Although the boards seems to be identical, the R01A has a 33 MHz independent crystal for the PCI bus clock in the back side of the board, while the R01 uses the Danube 33MHz internal clock as blogic noted.

Hardware Highlights

CPU Ram Flash Network USB Serial UART
Lantiq Xway Danube @333Mhz 64MB 4MB 4 Ports 1x Yes ?

Openwrt status

  • ADSL modem is working with Annex A.
  • FXS works and can be used with Asterisk or danube-voip.
  • USB works.
  • WIFI works in trunk since R34939 and in AA since R36510

Note: When using integrated ADSL the SoC runs very hot, so would be a good idea to replace the stock heatsink to avoid issues, while working only as a router the heat emission is low.

Installation

Flash Layout

Please check out the article The OpenWrt Flash Layout. It contains an example and a couple of explanations.

Original flash layout

---------------------------------------
    Area            Address      Length 
---------------------------------------
[0] Boot            0xB0000000     128K
[1] Configuration   0xB0020000     256K
[2] Web Image       0xB0060000    3648K
[3] Code Image      0xB0060000    3648K
[4] Boot Params     0xB03F0000      64K
[5] Flash Image     0xB0000000    4096K
---------------------------------------

OpenWRT Flash Layout

OpenWRT Flash Layout
partition start end size description
mtd0 0x00000000 0x00010000 64KB u-boot
mtd1 0x00010000 0x00030000 128KB u-boot environment
mtd2 0x00030000 0x003f0000 3932KB linux
mtd3 0x003f0000 0x00400000 64KB calibration data

Hardware info

Architecture: MIPS32 24KEc
Target: Lantiq
Vendor: Arcadyan
Bootloader: brnboot
System-On-Chip: Lantiq Danube PSB 50702 E Rev 1.3 (MIPS 24Kec)
CPU Speed: 333 Mhz
Flash chip: MXIC MX29LV320
Flash size: 4 MiB
RAM chip: PSC A3S12D40ETP (Zentel)
RAM size: 64 MiB DDR
WAN: 1x RJ11
Ethernet: Realtek RTL8306SD 4x LAN 10/100Mbit/s with VLAN support
Wireless: Atheros AR2417, 802.11b/g
Phone: 2x FXS (TAE ports which provide POTS via a SIP gateway)
Serial: yes
JTAG: ?
Buttons: power switch, WLAN button, reset button
Power: external PSU, 15V DC, 1A, polarity: -(+)
  • Recommended to make a backup of the whole flash before starting, specially the "boot params" partition as it has the calibration info for wireless to work and the base MAC addres.
  • This device comes from factory with brnboot as bootloader. It can be used to load u-boot via uart and the xmodem protocol to ram, as a second stage bootloader.
  • Use target Lantiq GPON/XWAY, subtarget Danube, target profile ARV4518PWR01 or ARV4518PWR01A.

CPU info:

system type: Danube rev 1.3 - ARV4518PW - SMC7908A-ISP, Airties WAV-221
processor: 0
cpu model: MIPS 24KEc V4.1
BogoMIPS: 221.18
wait instruction: yes
microsecond timers: yes
tlb_entries: 16
extra interrupt vector: yes
hardware watchpoint: yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
ASEs implemented: mips16 dsp
shadow register sets: 1
kscratch registers: 0
core: 0
VCED exceptions: not available
VCEI exceptions: not available

Switch Ports (for VLANs)

Port 5 is the internal connection to the router itself.

External label Switch port Mode
LAN 1 3 lan
LAN 2 2 lan
LAN 3 1 lan
LAN 4 0 lan
5 Internal CPU port

For now por based VLANs are not supported (wip).

LEDS

Name Colour Gpio
Power red 7
Power green 2
Wifi green 6
Adsl green 4
Internet green 5
Internet red 8
Voip green 100
Phone 1 green 101
Phone 2 green 102
Noname Orange 103
USB green 19
wps Orange 104
wps Green 105
wps Red 106

Photos

PCB R01A

PCB R01

BOOTLOG

Openwrt bootlog

ROM VER: 1.0.3 CFG 01 Read\0xfc ROM VER: 1.0.3 CFG 01 Read EEPROMX X U-Boot 2010.03 (Sep 19 2012 - 22:34:24) Board: ARV4518PW SoC: Danube/Twinpass/Vinax-VE V1.3, DDR Speed 166 MHz, CPU Speed 333 MHz DRAM: 64 MB Flash: 4 MB Net: searching for rtl8306 switch ... found lq_cpe_eth Hit any key to stop autoboot: 2 \0x08\0x08\0x08 1 \0x08\0x08\0x08 0 ## Booting kernel from Legacy Image at b0020000 ... Image Name: MIPS OpenWrt Linux-3.7.1 Created: 2013-01-05 14:23:41 UTC Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 1110216 Bytes = 1.1 MB Load Address: 80002000 Entry Point: 80002000 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Starting kernel ... [ 0.000000] Linux version 3.7.1 (pepe@debian) (gcc version 4.6.4 20121106 (prerelease) (Linaro GCC 4.6-2012.11) ) #1 Sat Jan 5 15:23:35 CET 2013 [ 0.000000] SoC: Danube rev 1.3 [ 0.000000] bootconsole [early0] enabled [ 0.000000] CPU revision is: 00019641 (MIPS 24KEc) [ 0.000000] Board: ARV4518PW - SMC7908A-ISP, Airties WAV-221 [ 0.000000] Determined physical RAM map: [ 0.000000] memory: 04000000 @ 00000000 (usable) [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x00000000-0x03ffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x00000000-0x03ffffff] [ 0.000000] On node 0 totalpages: 4096 [ 0.000000] free_area_init_node: node 0, pgdat 80316770, node_mem_map 81002ce0 [ 0.000000] Normal zone: 8 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 4088 pages, LIFO batch:0 [ 0.000000] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping off. Total pages: 4088 [ 0.000000] Kernel command line: console=ttyLTQ0,115200 init=/etc/preinit [ 0.000000] PID hash table entries: 256 (order: -4, 1024 bytes) [ 0.000000] Dentry cache hash table entries: 8192 (order: 1, 32768 bytes) [ 0.000000] Inode-cache hash table entries: 4096 (order: 0, 16384 bytes) [ 0.000000] __ex_table already sorted, skipping sort [ 0.000000] Writing ErrCtl register=00074fb8 [ 0.000000] Readback ErrCtl register=00074fb8 [ 0.000000] Memory: 61600k/65536k available (2557k kernel code, 3936k reserved, 597k data, 224k init, 0k highmem) [ 0.000000] SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] NR_IRQS:256 [ 0.000000] CPU Clock: 333MHz [ 0.036000] Calibrating delay loop... 221.18 BogoMIPS (lpj=442368) [ 0.036000] pid_max: default: 32768 minimum: 301 [ 0.040000] Mount-cache hash table entries: 2048 [ 0.044000] pinctrl core: initialized pinctrl subsystem [ 0.048000] NET: Registered protocol family 16 [ 0.068000] pinctrl-xway 1e100b10.pinmux: Init done [ 0.072000] dma-xway 1e104100.dma: Init done - hw rev: 3, ports: 5, channels: 20 [ 0.080000] PCI host bridge /fpi@10000000/pci@E105400 ranges: [ 0.084000] MEM 0x0000000018000000..0x0000000019ffffff [ 0.088000] IO 0x000000001ae00000..0x000000001affffff [ 0.108000] bio: create slab <bio-0> at 0 [ 0.116000] usbcore: registered new interface driver usbfs [ 0.120000] usbcore: registered new interface driver hub [ 0.124000] usbcore: registered new device driver usb [ 0.128000] PCI host bridge to bus 0000:00 [ 0.132000] pci_bus 0000:00: root bus resource [mem 0x18000000-0x19ffffff] [ 0.136000] pci_bus 0000:00: root bus resource [io 0x1ae00000-0x1affffff] [ 0.140000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 0.144000] pci 0000:00:0e.0: [168c:ff1a] type 00 class 0x020000 [ 0.144000] pci 0000:00:0e.0: reg 10: [mem 0x00000000-0x0000ffff] [ 0.144000] pci 0000:00:0e.0: unsupported PM cap regs version (4) [ 0.148000] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 00 [ 0.148000] pci 0000:00:0e.0: BAR 0: assigned [mem 0x18000000-0x1800ffff] [ 0.152000] pci 0000:00:0e.0: SLOT:14 PIN:1 IRQ:30 [ 0.156000] Switching to clocksource MIPS [ 0.164000] NET: Registered protocol family 2 [ 0.172000] TCP established hash table entries: 2048 (order: 0, 16384 bytes) [ 0.176000] TCP bind hash table entries: 2048 (order: -1, 8192 bytes) [ 0.184000] TCP: Hash tables configured (established 2048 bind 2048) [ 0.192000] TCP: reno registered [ 0.196000] UDP hash table entries: 1024 (order: 0, 16384 bytes) [ 0.200000] UDP-Lite hash table entries: 1024 (order: 0, 16384 bytes) [ 0.208000] NET: Registered protocol family 1 [ 0.212000] PCI: CLS 0 bytes, default 32 [ 0.212000] gptu: totally 6 16-bit timers/counters [ 0.216000] gptu: misc_register on minor 63 [ 0.220000] gptu: succeeded to request irq 126 [ 0.228000] gptu: succeeded to request irq 127 [ 0.232000] gptu: succeeded to request irq 128 [ 0.236000] gptu: succeeded to request irq 129 [ 0.240000] gptu: succeeded to request irq 130 [ 0.244000] gptu: succeeded to request irq 131 [ 0.252000] ath5k,eeprom 103f0400.ath5k_eep: loaded ath5k eeprom [ 0.264000] lantiq,vmmc 1f103000.vmmc: requested GPIO 255 [ 0.272000] lantiq,vmmc 1f103000.vmmc: reserved 1MB at 0x02200000 [ 0.312000] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.320000] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 0.332000] msgmni has been set to 120 [ 0.336000] io scheduler noop registered [ 0.340000] io scheduler deadline registered (default) [ 0.344000] 1e100c00.serial: ttyLTQ0 at MMIO 0x1e100c00 (irq = 112) is a lantiq,asc [ 0.352000] console [ttyLTQ0] enabled, bootconsole disabled [ 0.368000] ltq_nor: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x00007f Chip ID 0x0022f9 [ 0.376000] ltq_nor: Found an alias at 0x400000 for the chip at 0x0 [ 0.376000] ltq_nor: Found an alias at 0x800000 for the chip at 0x0 [ 0.376000] ltq_nor: Found an alias at 0xc00000 for the chip at 0x0 [ 0.376000] Amd/Fujitsu Extended Query Table at 0x0040 [ 0.380000] Amd/Fujitsu Extended Query version 1.1. [ 0.388000] number of CFI chips: 1 [ 0.388000] 4 ofpart partitions found on MTD device ltq_nor [ 0.396000] Creating 4 MTD partitions on "ltq_nor": [ 0.400000] 0x000000000000-0x000000010000 : "uboot" [ 0.408000] 0x000000010000-0x000000020000 : "uboot_env" [ 0.416000] 0x000000020000-0x0000003f0000 : "linux" [ 0.420000] found squashfs behind kernel [ 0.424000] Creating 2 MTD partitions on "ltq_nor": [ 0.428000] 0x000000020000-0x00000012f108 : "kernel" [ 0.432000] mtd: partition "kernel" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only [ 0.448000] 0x00000012f108-0x0000003f0000 : "rootfs" [ 0.452000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only [ 0.468000] mtd: partition "rootfs" set to be root filesystem [ 0.472000] mtd: partition "rootfs_data" created automatically, ofs=390000, len=60000 [ 0.480000] 0x000000390000-0x0000003f0000 : "rootfs_data" [ 0.488000] 0x0000003f0000-0x000000400000 : "boardconfig" [ 0.516000] libphy: ltq_mii: probed [ 0.548000] Registering RTL8306SD switch with Chip ID: 0x5988, version: 0x0000 [ 0.552000] eth0: attached PHY [Realtek RTL8306S] (phy_addr=1e180000.etop-ff:00, irq=-1) [ 0.564000] wdt 1f8803f0.watchdog: Init done [ 0.568000] leds-gpio gpio-leds.5: pins are not configured from the driver [ 0.576000] Registered led device: power [ 0.576000] Registered led device: dsl [ 0.576000] Registered led device: online [ 0.576000] Registered led device: wifi [ 0.576000] Registered led device: wps [ 0.576000] Registered led device: dsl2 [ 0.580000] Registered led device: usb [ 0.580000] Registered led device: voice [ 0.580000] Registered led device: fxs1 [ 0.580000] Registered led device: fxs2 [ 0.580000] Registered led device: fxo [ 0.584000] TCP: cubic registered [ 0.584000] NET: Registered protocol family 17 [ 0.588000] 8021q: 802.1Q VLAN Support v1.8 [ 0.608000] VFS: Mounted root (squashfs filesystem) readonly on device 31:4. [ 0.616000] Freeing unused kernel memory: 224k freed [ 8.464000] jffs2: notice: (489) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (0 unchecked, 0 orphan) and 9 of xref (0 dead, 2 orphan) found. [ 9.056000] SCSI subsystem initialized [ 9.192000] Initializing USB Mass Storage driver... [ 9.196000] usbcore: registered new interface driver usb-storage [ 9.204000] USB Mass Storage support registered. [ 17.260000] Compat-drivers backport release: compat-drivers-2012-12-04 [ 17.264000] Backport based on wireless-testing.git master-2012-12-06 [ 17.268000] compat.git: wireless-testing.git [ 17.316000] cfg80211: Calling CRDA to update world regulatory domain [ 17.320000] cfg80211: World regulatory domain updated: [ 17.324000] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) [ 17.332000] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) [ 17.340000] cfg80211: (2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) [ 17.348000] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) [ 17.356000] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) [ 17.364000] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) [ 18.600000] PCI: Enabling device 0000:00:0e.0 (0000 -> 0002) [ 18.600000] ath5k 0000:00:0e.0: registered as 'phy0' [ 18.612000] ath: EEPROM regdomain: 0x60 [ 18.612000] ath: EEPROM indicates we should expect a direct regpair map [ 18.612000] ath: Country alpha2 being used: 00 [ 18.612000] ath: Regpair used: 0x60 [ 18.612000] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht' [ 18.612000] ath5k: phy0: Atheros AR2417 chip found (MAC: 0xf0, PHY: 0x70) [ 18.736000] NET: Registered protocol family 8 [ 18.740000] NET: Registered protocol family 20 [ 19.436000] PPP generic driver version 2.4.2 [ 20.056000] ip_tables: (C) 2000-2006 Netfilter Core Team [ 20.352000] NET: Registered protocol family 24 [ 20.540000] nf_conntrack version 0.5.0 (966 buckets, 3864 max) [ 21.008000] IFX MEI Version 5.00.00 [ 21.040000] IFXUSB: ifxusb_hcd: version 3.2 B110801 [ 21.548000] IFXUSB: USB core #0 soft-reset [ 21.748000] IFXUSB: USB core #0 soft-reset [ 21.752000] ifxusb_hcd ifxusb_hcd: IFX USB Controller [ 21.756000] ifxusb_hcd ifxusb_hcd: new USB bus registered, assigned bus number 1 [ 21.764000] ifxusb_hcd ifxusb_hcd: irq 62, io mem 0xbe101000 [ 21.768000] IFXUSB: Mode Mismatch Interrupt: currently in Host mode [ 21.776000] IFXUSB: Mode Mismatch Interrupt: currently in Host mode [ 21.784000] IFXUSB: Init: Power Port (0) [ 21.788000] hub 1-0:1.0: USB hub found [ 21.788000] hub 1-0:1.0: 1 port detected [ 21.796000] ifxusb_hcd ifxusb_hcd: requested GPIO 238 [ 21.972000] [ 21.972000] [ 21.972000] Infineon CPE API Driver version: DSL CPE API V3.24.4.4 [ 21.996000] ATM1.0.26 ATM (A1) firmware version 0.17 [ 22.000000] ifxmips_atm: ATM init succeed [ 30.840000] device eth0 entered promiscuous mode [ 30.952000] br-lan: port 1(eth0) entered forwarding state [ 30.956000] br-lan: port 1(eth0) entered forwarding state [ 32.960000] br-lan: port 1(eth0) entered forwarding state BusyBox v1.19.4 (2013-01-05 15:10:36 CET) built-in shell (ash) Enter 'help' for a list of built-in commands. _______ ________ __ | |.-----.-----.-----.| | | |.----.| |_ | - || _ | -__| || | | || _|| _| |_______|| __|_____|__|__||________||__| |____| |__| W I R E L E S S F R E E D O M ----------------------------------------------------- BARRIER BREAKER (Bleeding Edge, r35016) ----------------------------------------------------- * 1/2 oz Galliano Pour all ingredients into * 4 oz cold Coffee an irish coffee mug filled * 1 1/2 oz Dark Rum with crushed ice. Stir. * 2 tsp. Creme de Cacao ----------------------------------------------------- root@OpenWrt:/#


Serial Port

  • Serial port is at 3.3v and the bitrate is 115200.
  • Going horizontally from the marked pin (1): 2:RX, 3:TX, 5:GND, ( 6.+3.3v No need to plug this one).

U-Boot images

  • uboot-lantiq-arv4518PW_brnboot meant to be loaded from brnboot as a 2nd stage bootloader, on memory.
  • uboot-lantiq-arv4518PW_flash meant to be flashed into the unit as the main bootloader, at 0xB0000000-0xB000FFFF.
  • uboot-lantiq-arv4518PW_ramboot meant to be uploaded via UART by the cpu if flash's bootloader is broken, for rescue purposes.
  • If kernel ignores parameters from u-boot, remove the preceding - in linux's hardcoded cmdline.

UART boot

To enable UART booting in the ARV4518 board, just shortcut R80 and put the left side of R65 to +3.3V and…

ROM VER: 1.0.3
CFG 04
Read EEPROMX
X
UART

Done!

  • Then upload the uboot.asc version from uboot-lantiq-arv4518PW_ramboot.

SPI

Serial Peripheral Interface

The Lantiq Danube has a SPI interface. In some boards it is used to drive a SI3050, while in others like the ARV4518PW only the solder pads are present, so could be a chance to attach a SPI device to the board. In this board the possible location of the SPI pads is in U41.

The SPI interface signals should be the same that there are in the Huawei HG556

This is still work in progress.

Hardware Mods

As a beginner, you really should inform yourself about soldering in general and then even obtain some experience!

8MB Flash Mod

This device uses a 32Mbit (4MB x 8Bits, 48 tsop, 90ns) NOR flash, so idealy we need to find an identical 64Mbit chip, bigger chips with the same layout are non-existant. We also need to have the last 64KB of data, off the old flash (wifi calibration, base mac). In case we have UART (strongly recommended), we do not need to program the new flash by an external programmer, before we solder it on the board. Lastly, we have to compile a new kernel, so that it expects the calibration data to be at 0xB07f0000 instead of the stock 0xb03f0000 and make use of the free space for root.

A chip that is known to work is the mx29lv640ebti-70g. Chances are that these could also work:

  • MX29LV640ETTI-70G
  • MX29LV640DBTC-90G
  • MX29LV640BBTC-90G
  • MX29LV640MTTC-90G

Or any other with the same specs.

After soldering the new chip in and making sure all connections are solid, we boot the device in UART mode and upload uboot.asc. Uboot should recognize the new flash without any mod and tell us it is 8MB.

ROM VER: 1.0.3 CFG 01 Readό ROM VER: 1.0.3 CFG 01 Read EEPROMX X U-Boot 2010.03-dirty (Feb 09 2017 - 18:22:33) Board: ARV4518PW SoC: Danube/Twinpass/Vinax-VE V1.3, DDR Speed 166 MHz, CPU Speed 333 MHz DRAM: 64 MB Flash: 8 MB *** Warning - bad CRC, using default environment Net: searching for rtl8306 switch ... found lq_cpe_eth Hit any key to stop autoboot: 0 ARV4518 => fli Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0xC2, Device ID: 0x22CB Erase timeout: 16384 ms, write timeout: 1 ms Sector Start Addresses: B0000000 B0002000 B0004000 B0006000 B0008000 B000A000 B000C000 B000E000 B0010000 RO B0020000 B0030000 B0040000 B0050000 B0060000 B0070000 B0080000 B0090000 B00A0000 B00B0000 B00C0000 B00D0000 B00E0000 B00F0000 B0100000 B0110000 B0120000 B0130000 B0140000 B0150000 B0160000 B0170000 B0180000 B0190000 B01A0000 B01B0000 B01C0000 B01D0000 B01E0000 B01F0000 B0200000 B0210000 B0220000 B0230000 B0240000 B0250000 B0260000 B0270000 B0280000 B0290000 B02A0000 B02B0000 B02C0000 B02D0000 B02E0000 B02F0000 B0300000 B0310000 B0320000 B0330000 B0340000 B0350000 B0360000 B0370000 B0380000 B0390000 B03A0000 B03B0000 B03C0000 B03D0000 B03E0000 B03F0000 B0400000 B0410000 B0420000 B0430000 B0440000 B0450000 B0460000 B0470000 B0480000 B0490000 B04A0000 B04B0000 B04C0000 B04D0000 B04E0000 B04F0000 B0500000 B0510000 B0520000 B0530000 B0540000 B0550000 B0560000 B0570000 B0580000 B0590000 B05A0000 B05B0000 B05C0000 B05D0000 B05E0000 B05F0000 B0600000 B0610000 B0620000 B0630000 B0640000 B0650000 B0660000 B0670000 B0680000 B0690000 B06A0000 B06B0000 B06C0000 B06D0000 B06E0000 B06F0000 B0700000 B0710000 B0720000 B0730000 B0740000 B0750000 B0760000 B0770000 B0780000 B0790000 B07A0000 B07B0000 B07C0000 B07D0000 B07E0000 B07F0000 ARV4518 =>

At this point we un-protect all sectors

protect off all
Erase any junk that may be left on the new flash, so that we can write new data.
erase all 
Then we load the 64KB calibration data, and copy it at the end of the memory.
loady 0x81000000 (we send the .bin file by ymodem to ram)
cp.b 0x81000000 0xb07f0000 0x10000 (we copy the file from ram to rom and we specify the length of the file)
We use the same procedure to copy the bootstrap uboot to the flash at the beggining address 0xb0000000, and our new kernel at 0xb0020000. After we reboot we should be greeted by openwrt. Note the new layout of the flash.

## Booting kernel from Legacy Image at b0020000 …

 Image Name:   MIPS OpenWrt Linux-3.3.8
 Created:      2017-02-09  16:30:50 UTC
 Image Type:   MIPS Linux Kernel Image (lzma compressed)
 Data Size:    960784 Bytes = 938.3 kB
 Load Address: 80002000
 Entry Point:  80002000
 Verifying Checksum ... OK
 Uncompressing Kernel Image ... OK

Starting kernel …

[ 0.000000] Linux version 3.3.8 (builder@homeserver) (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #1 Thu Feb 9 18:30:46 EET 2017 [ 0.000000] SoC: Danube rev 1.3 [ 0.000000] bootconsole [early0] enabled [ 0.000000] CPU revision is: 00019641 (MIPS 24KEc) [ 0.000000] Determined physical RAM map: [ 0.000000] memory: 04000000 @ 00000000 (usable) [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] Zone PFN ranges: [ 0.000000] Normal 0x00000000 → 0x00004000 [ 0.000000] Movable zone start PFN for each node [ 0.000000] Early memory PFN ranges [ 0.000000] 0: 0x00000000 → 0x00004000 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256 [ 0.000000] Kernel command line: console=ttyLTQ1,115200 rootfstype=squashfs,jffs2 machtype=ARV4518PW [ 0.000000] PID hash table entries: 256 (order: -2, 1024 bytes) [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes [ 0.000000] Writing ErrCtl register=0007bdd8 [ 0.000000] Readback ErrCtl register=0007bdd8 [ 0.000000] Memory: 61868k/65536k available (2262k kernel code, 3668k reserved, 398k data, 172k init, 0k highmem) [ 0.000000] NR_IRQS:256 [ 0.000000] CPU Clock: 333MHz [ 0.000000] Calibrating delay loop… 221.18 BogoMIPS (lpj=442368) [ 0.036000] pid_max: default: 32768 minimum: 301 [ 0.040000] Mount-cache hash table entries: 512 [ 0.048000] NET: Registered protocol family 16 [ 0.056000] gpiochip_add: registered GPIOs 0 to 15 on device: ltq_gpio [ 0.060000] gpiochip_add: registered GPIOs 16 to 31 on device: ltq_gpio [ 0.064000] MIPS: machine is ARV4518PW - SMC7908A-ISP, Airties WAV-221 [ 0.068000] gpiochip_add: registered GPIOs 100 to 115 on device: ltq_ebu [ 0.108000] bio: create slab <bio-0> at 0 [ 0.116000] PCI host bridge to bus 0000:00 [ 0.120000] pci_bus 0000:00: root bus resource [mem 0x18000000-0x19ffffff] [ 0.124000] pci_bus 0000:00: root bus resource [io 0x1ae00000-0x1affffff] [ 0.128000] pci 0000:00:0e.0: BAR 0: assigned [mem 0x18000000-0x1800ffff] [ 0.132000] pci 0000:00:0e.0: SLOT:14 PIN:1 IRQ:30 [ 0.136000] Switching to clocksource MIPS [ 0.144000] NET: Registered protocol family 2 [ 0.152000] IP route cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.156000] TCP established hash table entries: 2048 (order: 2, 16384 bytes) [ 0.164000] TCP bind hash table entries: 2048 (order: 1, 8192 bytes) [ 0.172000] TCP: Hash tables configured (established 2048 bind 2048) [ 0.176000] TCP reno registered [ 0.180000] UDP hash table entries: 256 (order: 0, 4096 bytes) [ 0.188000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) [ 0.192000] NET: Registered protocol family 1 [ 0.200000] gptu: totally 6 16-bit timers/counters [ 0.204000] gptu: misc_register on minor 63 [ 0.208000] gptu: succeeded to request irq 126 [ 0.212000] gptu: succeeded to request irq 127 [ 0.216000] gptu: succeeded to request irq 128 [ 0.220000] gptu: succeeded to request irq 129 [ 0.224000] gptu: succeeded to request irq 130 [ 0.232000] gptu: succeeded to request irq 131 [ 0.240000] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.244000] JFFS2 version 2.2 (NAND) (SUMMARY) (ZLIB) (RTIME) (CMODE_FAVOURLZO) © 2001-2006 Red Hat, Inc. [ 0.256000] msgmni has been set to 120 [ 0.260000] io scheduler noop registered [ 0.264000] io scheduler deadline registered (default) [ 0.268000] ltq_asc.1: ttyLTQ1 at MMIO 0x1e100c00 (irq = 112) is a ltq_asc [ 0.276000] console [ttyLTQ1] enabled, bootconsole disabled [ 0.276000] console [ttyLTQ1] enabled, bootconsole disabled [ 0.292000] ltq_nor: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x0000c2 Chip ID 0x0022cb [ 0.300000] Amd/Fujitsu Extended Query Table at 0x0040 [ 0.304000] Amd/Fujitsu Extended Query version 1.1. [ 0.308000] number of CFI chips: 1 [ 0.312000] Creating 4 MTD partitions on "ltq_nor": [ 0.316000] 0x000000000000-0x000000010000 : "uboot" [ 0.324000] 0x000000010000-0x000000020000 : "uboot_env" [ 0.332000] 0x000000020000-0x0000007f0000 : "linux" [ 0.336000] found squashfs behind kernel [ 0.340000] Creating 2 MTD partitions on "ltq_nor": [ 0.344000] 0x000000020000-0x00000010a950 : "kernel" [ 0.348000] mtd: partition "kernel" must either start or end on erase block boundary or be smaller than an erase block – forcing read-only [ 0.364000] 0x00000010a950-0x0000007f0000 : "rootfs" [ 0.368000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block – forcing read-only [ 0.384000] mtd: partition "rootfs" set to be root filesystem [ 0.388000] mtd: partition "rootfs_data" created automatically, ofs=300000, len=4F0000 [ 0.396000] 0x000000300000-0x0000007f0000 : "rootfs_data" [ 0.404000] 0x0000007f0000-0x000000800000 : "board_config" [ 0.428000] ltq_mii: probed [ 0.460000] Registering RTL8306SD switch with Chip ID: 0x5988, version: 0x0000 [ 0.468000] eth0: attached PHY [Realtek RTL8306S] (phy_addr=ltq_etop-fffffff:00, irq=-1) [ 0.488000] TCP cubic registered [ 0.488000] NET: Registered protocol family 17 [ 0.496000] 8021q: 802.1Q VLAN Support [ 0.512000] VFS: Mounted root (squashfs filesystem) readonly on device 31:4. [ 0.516000] Freeing unused kernel memory: 172k freed

root@(none):/# df -h
Filesystem                Size      Used Available Use% Mounted on
rootfs                    4.9M      2.0M      2.9M  41% /
/dev/root                 2.0M      2.0M         0 100% /rom
tmpfs                    30.3M     16.0K     30.3M   0% /tmp
tmpfs                   512.0K         0    512.0K   0% /dev
/dev/mtdblock5            4.9M      2.0M      2.9M  41% /overlay
overlayfs:/overlay        4.9M      2.0M      2.9M  41% /

TODO

  • Enable vlan support as default, like in some other boards.UCI Defaults
  • Add support for hardware revision R01 in Attitude Adjustment. Possible patch.

Tags

toh/arcadyan/arv4518pw.txt · Last modified: 2017/02/12 15:30 by Ntalton