Arcadyan ARV4518PW (SMC-7908-ISP)
Known Supported Versions
| OpenWrt Versions Supported | ||
|---|---|---|
| Backfire 10.03.1 | Attitude adjustment | Barrier breaker |
There are two hardware revisions. The revision is in the bottom label:
- R01: only with backfire 10.03.1. Fixed in R35352.
- R01A: all versions.
Although the boards seems to be identical the R01A has a 33 MHz independent crystal for the PCI bus clock in the back side of the board, while the R01 uses the Danube 33MHz internal clock as blogic noted.
Hardware Highlights
| CPU | Ram | Flash | Network | USB | Serial | UART |
|---|---|---|---|---|---|---|
| Lantiq Xway Danube @333Mhz | 64MB | 4MB | 4 Ports | Yes | Yes | ? |
Openwrt status
- ADSL modem is working with Annex A.
- FXS works and can be used with Asterisk or danube-voip.
- USB works.
Note: When using integrated ADSL the SoC runs very hot, so would be a good idea to replace the heatsink, while working only as a router the heat emission is low.
Installation
Flash Layout
Please check out the article Flash Layout. It contains an example and a couple of explanations.
| Modified Flash Layout | ||||
|---|---|---|---|---|
| partition | start | end | size | description |
| mtd0 | 0x00000000 | 0x00010000 | 64KB | u-boot |
| mtd1 | 0x00010000 | 0x00030000 | 128KB | u-boot environment |
| mtd2 | 0x00030000 | 0x003f0000 | 3932KB | linux |
| mtd3 | 0x003f0000 | 0x00400000 | 64KB | calibration data |
Hardware info
| Architecture: | MIPS32r2 24KEc |
| Target: | Lantiq |
| Vendor: | Arcadyan |
| Bootloader: | brnboot |
| System-On-Chip: | Lantiq Danube PSB 50702 E Rev 1.3 (MIPS 24Kec) |
| CPU Speed: | 333 Mhz |
| Flash chip: | MXIC MX29LV320 |
| Flash size: | 4 MiB |
| RAM chip: | PSC A3S12D40ETP (Zentel) |
| RAM size: | 64 MiB DDR |
| WAN: | 1x RJ11 |
| Ethernet: | Realtek RTL8306SD 4x LAN 10/100Mbit/s with VLAN support |
| Wireless: | Atheros AR2417 (Nala), 802.11b/g 54MBit/s |
| Phone: | 2x FXS (TAE ports which provide POTS via a SIP gateway) |
| Serial: | yes |
| JTAG: | ? |
| Buttons: | power switch, WLAN button, reset button |
| Power: | external PSU, 15V DC, 1A, polarity: -(+) |
CPU info:
system type: Danube rev 1.3 - ARV4518PW - SMC7908A-ISP, Airties WAV-221 processor: 0 cpu model: MIPS 24KEc V4.1 BogoMIPS: 221.18 wait instruction: yes microsecond timers: yes tlb_entries: 16 extra interrupt vector: yes hardware watchpoint: yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb] ASEs implemented: mips16 dsp shadow register sets: 1 kscratch registers: 0 core: 0 VCED exceptions: not available VCEI exceptions: not available
Switch Ports (for VLANs)
Port 5 is the internal connection to the router itself.
| External label | Switch port | Mode |
|---|---|---|
| LAN 1 | 3 | lan |
| LAN 2 | 2 | lan |
| LAN 3 | 1 | lan |
| LAN 4 | 0 | lan |
| 5 | Internal CPU port |
LEDS
| Name | Colour | Gpio |
|---|---|---|
| Power | red | 7 |
| Power | green | 2 |
| Wifi | green | 6 |
| Adsl | green | 4 |
| Internet | green | 5 |
| Internet | red | 8 |
| Voip | green | 100 |
| Phone 1 | green | 101 |
| Phone 2 | green | 102 |
| Noname | Orange | 103 |
| USB | green | 19 |
| wps | Orange | 104 |
| wps | Green | 105 |
| wps | Red | 106 |
Photos
BOOTLOG
Openwrt bootlog
ROM VER: 1.0.3
CFG 01
Read\0xfc
ROM VER: 1.0.3
CFG 01
Read EEPROMX
X
U-Boot 2010.03 (Sep 19 2012 - 22:34:24)
Board: ARV4518PW
SoC: Danube/Twinpass/Vinax-VE V1.3, DDR Speed 166 MHz, CPU Speed 333 MHz
DRAM: 64 MB
Flash: 4 MB
Net:
searching for rtl8306 switch ... found
lq_cpe_eth
Hit any key to stop autoboot: 2 \0x08\0x08\0x08 1 \0x08\0x08\0x08 0
## Booting kernel from Legacy Image at b0020000 ...
Image Name: MIPS OpenWrt Linux-3.7.1
Created: 2013-01-05 14:23:41 UTC
Image Type: MIPS Linux Kernel Image (lzma compressed)
Data Size: 1110216 Bytes = 1.1 MB
Load Address: 80002000
Entry Point: 80002000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Starting kernel ...
[ 0.000000] Linux version 3.7.1 (pepe@debian) (gcc version 4.6.4 20121106 (prerelease) (Linaro GCC 4.6-2012.11) )
#1 Sat Jan 5 15:23:35 CET 2013
[ 0.000000] SoC: Danube rev 1.3
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU revision is: 00019641 (MIPS 24KEc)
[ 0.000000] Board: ARV4518PW - SMC7908A-ISP, Airties WAV-221
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 04000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x00000000-0x03ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x00000000-0x03ffffff]
[ 0.000000] On node 0 totalpages: 4096
[ 0.000000] free_area_init_node: node 0, pgdat 80316770, node_mem_map 81002ce0
[ 0.000000] Normal zone: 8 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 4088 pages, LIFO batch:0
[ 0.000000] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes
[ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping off. Total pages: 4088
[ 0.000000] Kernel command line: console=ttyLTQ0,115200 init=/etc/preinit
[ 0.000000] PID hash table entries: 256 (order: -4, 1024 bytes)
[ 0.000000] Dentry cache hash table entries: 8192 (order: 1, 32768 bytes)
[ 0.000000] Inode-cache hash table entries: 4096 (order: 0, 16384 bytes)
[ 0.000000] __ex_table already sorted, skipping sort
[ 0.000000] Writing ErrCtl register=00074fb8
[ 0.000000] Readback ErrCtl register=00074fb8
[ 0.000000] Memory: 61600k/65536k available (2557k kernel code, 3936k reserved, 597k data, 224k init, 0k highmem)
[ 0.000000] SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] NR_IRQS:256
[ 0.000000] CPU Clock: 333MHz
[ 0.036000] Calibrating delay loop... 221.18 BogoMIPS (lpj=442368)
[ 0.036000] pid_max: default: 32768 minimum: 301
[ 0.040000] Mount-cache hash table entries: 2048
[ 0.044000] pinctrl core: initialized pinctrl subsystem
[ 0.048000] NET: Registered protocol family 16
[ 0.068000] pinctrl-xway 1e100b10.pinmux: Init done
[ 0.072000] dma-xway 1e104100.dma: Init done - hw rev: 3, ports: 5, channels: 20
[ 0.080000] PCI host bridge /fpi@10000000/pci@E105400 ranges:
[ 0.084000] MEM 0x0000000018000000..0x0000000019ffffff
[ 0.088000] IO 0x000000001ae00000..0x000000001affffff
[ 0.108000] bio: create slab
Serial Port
- Serial port is at 3.3v and the bitrate is 115200.
U-Boot images
- uboot-lantiq-arv4518PW_brnboot meant to be loaded from brnboot as a 2nd stage bootloader, on memory.
- uboot-lantiq-arv4518PW_flash meant to be flashed into the unit as the main bootloader, at 0xB0000000-0xB000FFFF.
- uboot-lantiq-arv4518PW_ramboot meant to be uploaded via UART by the cpu if flash's bootloader is broken, for rescue purposes.
- If kernel ignores parameters from u-boot, remove the preceding - in linux's hardcoded cmdline.
Original flash layout
---------------------------------------
Area Address Length
---------------------------------------
[0] Boot 0xB0000000 128K
[1] Configuration 0xB0020000 256K
[2] Web Image 0xB0060000 3648K
[3] Code Image 0xB0060000 3648K
[4] Boot Params 0xB03F0000 64K
[5] Flash Image 0xB0000000 4096K
---------------------------------------
UART boot
To enable UART booting in the ARV4518 board, just shortcut R80 and put the left side of R65 to +3.3V and…
ROM VER: 1.0.3 CFG 04 Read EEPROMX X UART
Done!
- Then upload the uboot.asc version from uboot-lantiq-arv4518PW_ramboot.
TODO
- Enable vlan support as default, like in some other boards.UCI Defaults
- Add support for hardware revision R01 in Attitude Adjustment. Possible patch.
Tags
toh/arcadyan/arv4518pw.txt · Last modified: 2013/06/11 23:01 by lorema
This text is licensed under a Creative Commons Attribution-ShareAlike 3.0 Unported License.




