Arcadyan ARV4518PW (SMC-7908-ISP)

Known Supported Versions

There are two versions of this board: one with RTL8306SD switch and the other with AR8216 switch.

  • Version 1: RTL8303SD
  • Version 2: AR8216
OpenWrt Version Supported
trunk

Hardware Highlights

CPU Ram Flash Network USB Serial UART
Lantiq Xway Danube @333Mhz 64MB 4MB 4 Ports Yes Yes ?

Openwrt status

  • ADSL modem is working with Annex A.
  • FXS works and can be used with owsip daemon or danube-voip.
  • USB works.
  • WIFI has some errors.

Installation

Flash Layout

Please check out the article Flash Layout. It contains an example and a couple of explanations.

Modified Flash Layout
partition start end size description
mtd0 0x00000000 0x00010000 64KB u-boot
mtd1 0x00010000 0x00030000 128KB u-boot environment
mtd2 0x00030000 0x003f0000 3932KB linux
mtd3 0x003f0000 0x00400000 64KB calibration data

Hardware info

Architecture: MIPS
Target: Lantiq
Vendor: Arcadyan
Bootloader: brnboot
System-On-Chip: Lantiq Danube PSB 50702
CPU Speed: 333 Mhz
Flash chip: MXIC MX29LV320
Flash size: 4 MiB
RAM chip: PSC A3S12D40ETP (Zentel)
RAM size: 64 MiB (DDR400 SDRAM)
WAN: 1x RJ11
Ethernet: Realtek RTL8306SD or Atheros AR8216, 4x LAN 100MBit/s
Wireless: Atheros AR2417, 802.11b/g 54MBit/s
Phone: 2x FXS (TAE ports which provide POTS via a SIP gateway)
Serial: yes
JTAG: ?
Buttons: power switch, WLAN button, reset button
Power: external PSU, 15V DC, 1A, polarity: -(+)

Photos

PCB: Version 1
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PCB: Version 2
http://www.dodaj.rs/?18/ze/yyPCR7i/jd502731.jpg

BOOTLOG

Openwrt bootlog: Version 1

[    0.000000] Linux version 3.2.12 (pepe@debian) (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #4 Thu Mar 29 17:59:58 CEST 2012
[    0.000000] SoC: Danube rev 1.3
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU revision is: 00019641 (MIPS 24KEc)
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 04000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Zone PFN ranges:
[    0.000000]   Normal   0x00000000 -> 0x00004000
[    0.000000] Movable zone start PFN for each node
[    0.000000] early_node_map[1] active PFN ranges
[    0.000000]     0: 0x00000000 -> 0x00004000
[    0.000000] On node 0 totalpages: 16384
[    0.000000] free_area_init_node: node 0, pgdat 802baa50, node_mem_map 81000000
[    0.000000]   Normal zone: 128 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 16256 pages, LIFO batch:3
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 16256
[    0.000000] Kernel command line: console=ttyLTQ1,115200 rootfstype=squashfs,jffs2 machtype=ARV4518PW
[    0.000000] PID hash table entries: 256 (order: -2, 1024 bytes)
[    0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[    0.000000] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes
[    0.000000] Writing ErrCtl register=00000008
[    0.000000] Readback ErrCtl register=00000008
[    0.000000] Memory: 61812k/65536k available (2378k kernel code, 3724k reserved, 409k data, 168k init, 0k highmem)
[    0.000000] NR_IRQS:256
[    0.000000] CPU Clock: 333MHz
[    0.000000] Calibrating delay loop... 221.18 BogoMIPS (lpj=442368)
[    0.040000] pid_max: default: 32768 minimum: 301
[    0.044000] Mount-cache hash table entries: 512
[    0.052000] NET: Registered protocol family 16
[    0.064000] MIPS: machine is ARV4518PW - SMC7908A-ISP, Airties WAV-221
[    0.092000] bio: create slab <bio-0> at 0
[    0.100000] pci_bus 0000:00: scanning bus
[    0.100000] pci 0000:00:0e.0: [168c:ff1a] type 0 class 0x000200
[    0.100000] pci 0000:00:0e.0: calling 0x80005e30
[    0.100000] pci 0000:00:0e.0: calling 0x8024b8ec
[    0.100000] pci 0000:00:0e.0: reg 10: [mem 0x00000000-0x0000ffff]
[    0.100000] pci 0000:00:0e.0: calling 0x8024cde0
[    0.100000] pci 0000:00:0e.0: supports D2
[    0.100000] pci_bus 0000:00: fixups for bus
[    0.100000] pci_bus 0000:00: bus scan returning with max=00
[    0.100000] pci 0000:00:0e.0: BAR 0: assigned [mem 0x18000000-0x1800ffff]
[    0.104000] pci 0000:00:0e.0: BAR 0: set to [mem 0x18000000-0x1800ffff] (PCI address [0x18000000-0x1800ffff])
[    0.108000] pci 0000:00:0e.0: SLOT:14 PIN:1 IRQ:30
[    0.112000] pci 0000:00:0e.0: fixup irq: got 30
[    0.112000] Switching to clocksource MIPS
[    0.120000] NET: Registered protocol family 2
[    0.128000] IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.132000] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
[    0.140000] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.148000] TCP: Hash tables configured (established 2048 bind 2048)
[    0.152000] TCP reno registered
[    0.156000] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.164000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.168000] NET: Registered protocol family 1
[    0.172000] pci 0000:00:0e.0: calling 0x80168220
[    0.176000] pci 0000:00:0e.0: calling 0x8024d778
[    0.176000] PCI: CLS 0 bytes, default 32
[    0.176000] gptu: totally 6 16-bit timers/counters
[    0.180000] gptu: misc_register on minor 63
[    0.184000] gptu: succeeded to request irq 126
[    0.192000] gptu: succeeded to request irq 127
[    0.196000] gptu: succeeded to request irq 128
[    0.200000] gptu: succeeded to request irq 129
[    0.204000] gptu: succeeded to request irq 130
[    0.208000] gptu: succeeded to request irq 131
[    0.220000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.224000] JFFS2 version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.236000] msgmni has been set to 120
[    0.240000] io scheduler noop registered
[    0.244000] io scheduler deadline registered (default)
[    0.248000] ltq_asc.1: ttyLTQ1 at MMIO 0x1e100c00 (irq = 112) is a ltq_asc
[    0.256000] console [ttyLTQ1] enabled, bootconsole disabled
[    0.272000] ltq_nor: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x0000c2 Chip ID 0x0022a8
[    0.280000] ltq_nor: Found an alias at 0x400000 for the chip at 0x0
[    0.280000] ltq_nor: Found an alias at 0x800000 for the chip at 0x0
[    0.280000] ltq_nor: Found an alias at 0xc00000 for the chip at 0x0
[    0.280000] Amd/Fujitsu Extended Query Table at 0x0040
[    0.284000]   Amd/Fujitsu Extended Query version 1.1.
[    0.288000] number of CFI chips: 1
[    0.292000] Creating 4 MTD partitions on "ltq_nor":
[    0.296000] 0x000000000000-0x000000020000 : "uboot"
[    0.304000] 0x000000020000-0x000000030000 : "uboot_env"
[    0.312000] 0x000000030000-0x0000003f0000 : "linux"
[    0.320000] found squashfs behind kernel
[    0.320000] Creating 2 MTD partitions on "ltq_nor":
[    0.324000] 0x000000030000-0x000000124ff8 : "kernel"
[    0.332000] mtd: partition "kernel" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.344000] 0x000000124ff8-0x0000003f0000 : "rootfs"
[    0.348000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.364000] mtd: partition "rootfs" set to be root filesystem
[    0.368000] mtd: partition "rootfs_data" created automatically, ofs=370000, len=80000
[    0.376000] 0x000000370000-0x0000003f0000 : "rootfs_data"
[    0.384000] 0x0000003f0000-0x000000400000 : "board_config"
[    0.408000] ltq_mii: probed
[    0.440000] Registering RTL8306SD switch with Chip ID: 0x5988, version: 0x0000
[    0.444000] eth0: attached PHY [Realtek RTL8306S] (phy_addr=0:00, irq=-1)
[    0.456000] Registered led device: soc:green:power
[    0.456000] Registered led device: soc:green:adsl
[    0.456000] Registered led device: soc:green:internet
[    0.456000] Registered led device: soc:green:wifi
[    0.460000] Registered led device: soc:yellow:wps
[    0.460000] Registered led device: soc:red:fail
[    0.460000] Registered led device: soc:green:usb
[    0.460000] Registered led device: soc:green:voip
[    0.460000] Registered led device: soc:green:fxs1
[    0.460000] Registered led device: soc:green:fxs2
[    0.464000] Registered led device: soc:green:fxo
[    0.464000] TCP westwood registered
[    0.464000] NET: Registered protocol family 17
[    0.472000] 8021q: 802.1Q VLAN Support v1.8
[    0.488000] VFS: Mounted root (squashfs filesystem) readonly on device 31:4.
[    0.492000] Freeing unused kernel memory: 168k freed
[    7.368000] JFFS2 notice: (341) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (0 unchecked, 0 orphan) and 9 of xref (
0 dead, 3 orphan) found.
[    8.432000] SCSI subsystem initialized
[    8.600000] usbcore: registered new interface driver usbfs
[    8.604000] usbcore: registered new interface driver hub
[    8.612000] usbcore: registered new device driver usb
[    8.888000] dwc_otg: version 2.60a 22-NOV-2006
[    9.492000] DWC_otg: Using DMA mode
[    9.496000] dwc_otg dwc_otg.0: DWC OTG Controller
[    9.500000] dwc_otg dwc_otg.0: new USB bus registered, assigned bus number 1
[    9.508000] dwc_otg dwc_otg.0: irq 62, io mem 0xffffffffbe101000
[    9.516000] DWC_otg: Init: Port Power? op_state=1
[    9.520000] DWC_otg: Init: Power Port (0)
[    9.524000] hub 1-0:1.0: USB hub found
[    9.528000] hub 1-0:1.0: 1 port detected
[    9.548000] Initializing USB Mass Storage driver...
[    9.552000] usbcore: registered new interface driver usb-storage
[    9.560000] USB Mass Storage support registered.
[    9.632000] DISCONNECTED PORT
[   32.416000] Compat-wireless backport release: compat-wireless-2012-02-27-1-r31141
[   32.424000] Backport based on wireless-testing.git master-2012-02-27
[   32.464000] cfg80211: Calling CRDA to update world regulatory domain
[   33.412000] cfg80211: World regulatory domain updated:
[   33.416000] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
[   33.424000] cfg80211:   (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
[   33.432000] cfg80211:   (2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
[   33.440000] cfg80211:   (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm)
[   33.448000] cfg80211:   (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
[   33.456000] cfg80211:   (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm)
[   34.056000] PCI: Enabling device 0000:00:0e.0 (0000 -> 0002)
[   34.060000] ath5k 0000:00:0e.0: enabling bus mastering
[   34.060000] ath5k 0000:00:0e.0: registered as 'phy0'
[   34.072000] ath: EEPROM regdomain: 0x67
[   34.072000] ath: EEPROM indicates we should expect a direct regpair map
[   34.072000] ath: Country alpha2 being used: 00
[   34.072000] ath: Regpair used: 0x67
[   34.072000] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht'
[   34.076000] ath5k phy0: Atheros AR2417 chip found (MAC: 0xf0, PHY: 0x70)
[   34.108000] NET: Registered protocol family 8
[   34.108000] NET: Registered protocol family 20
[   34.272000] Button Hotplug driver version 0.4.1
[   34.936000] PPP generic driver version 2.4.2
[   35.284000] ip_tables: (C) 2000-2006 Netfilter Core Team
[   35.492000] NET: Registered protocol family 24
[   35.564000] nf_conntrack version 0.5.0 (968 buckets, 3872 max)
[   35.816000] IFX MEI Version 5.00.00
[   35.960000]
[   35.960000] Infineon CPE API Driver version: DSL CPE API V3.24.4.4
[   35.996000]     ATM (A1) firmware version 1.0.19
[   36.000000] ifxmips_atm: ATM init succeed
[   40.296000] ath5k phy0: failed to warm reset the MAC Chip
[   40.300000] ath5k phy0: can't reset hardware (-5)
[   40.652000] device wlan0 entered promiscuous mode
[   41.216000] ath5k phy0: failed to warm reset the MAC Chip
[   41.220000] ath5k phy0: can't reset hardware (-5)
[   43.692000] device wlan0 left promiscuous mode
[   43.692000] br-lan: port 1(wlan0) entering disabled state
[   44.052000] device wlan0 entered promiscuous mode
[   49.400000] device eth0 entered promiscuous mode
[   52.452000] br-lan: port 2(eth0) entering forwarding state
[   52.456000] br-lan: port 2(eth0) entering forwarding state
[   52.460000] br-lan: port 1(wlan0) entering forwarding state
[   52.468000] br-lan: port 1(wlan0) entering forwarding state
[   67.488000] br-lan: port 2(eth0) entering forwarding state
[   67.492000] br-lan: port 1(wlan0) entering forwarding state

Serial Port

  • Serial port is at 3.3v and the bitrate is 115200.
  • Going horizontally from the marked pin (1): 2:RX, 3:TX, 5:GND, ( 6.+3.3v No need to plug this one).
  • Sometimes the serial is on soldered pins on J2; 1:Vcc (3.3v), 2:TX, 3:RX, 4:GND

U-Boot images

  • uboot-lantiq-arv4518PW_brnboot meant to be loaded from brnboot as a 2nd stage bootloader, on memory.
  • uboot-lantiq-arv4518PW_flash meant to be flashed into the unit as the main bootloader, at 0xB0000000-0xB000FFFF.
  • uboot-lantiq-arv4518PW_ramboot meant to be uploaded via UART by the cpu if flash's bootloader is broken, for rescue purposes.
  • If kernel ignores parameters from u-boot, remove the preceding - in linux's hardcoded cmdline.

Original flash layout

---------------------------------------
    Area            Address      Length 
---------------------------------------
[0] Boot            0xB0000000     128K
[1] Configuration   0xB0020000     256K
[2] Web Image       0xB0060000    3648K
[3] Code Image      0xB0060000    3648K
[4] Boot Params     0xB03F0000      64K
[5] Flash Image     0xB0000000    4096K
---------------------------------------

Layout for openwrt

This is a possible layout for making a bit better use of the flash, possible if we replace brnboot with u-boot. This is hardcoded into the kernel, in the file 'mach-arv45xx.c'

static struct mtd_partition arv45xx_partitions[] =
{
        {
                .name   = "uboot",
                .offset = 0x0,
                .size   = 0x10000,
        },
        {
                .name   = "uboot_env",
                .offset = 0x10000,
                .size   = 0x10000,
        },
        {
                .name   = "linux",
                .offset = 0x20000,
                .size   = 0x3d0000,
        },
        {
                .name   = "board_config",
                .offset = 0x3f0000,
                .size   = 0x10000,
        },
}

UART boot

To enable UART booting in the ARV4518 board, just shortcut R80 and put the left side of R65 to +3.3V and…

ROM VER: 1.0.3
CFG 04
Read EEPROMX
X
UART

Done!

  • Then upload the uboot.asc version from uboot-lantiq-arv4518PW_ramboot.

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toh/arcadyan/arv4518pw.txt · Last modified: 2012/04/24 03:48 by cienti