D-Link DIR-600/601(Rev.A1)

:!: Note: For DIR-600 (Rev.B1/B2) see D-Link DIR-300 Rev.B. DIR-601 (Rev.B1) is not yet supported

DIR-600

There are (at least) three revisions of this router: A1, B1 and B2. Rev.A1 has been rebranded as FR-54RTR. The FR-54RTR is a close enough match that it can be flashed with the A1's firmware from D-Link: ftp://ftp.dlink.com/Gateway/dir600/Firmware/dir600_firmware_101NA.zip

There are DIR-600N and DIR-600NW, both have reduced hardware feature (although not reduced price). DIR-600NW for example have reduced to 8MB memory and 2MB flash. DIR-600NB is suspected to have reduced features too. Any 3rd party firmware are unlikely able to run on these reduced hardwares. They seems only sold in China.

Supported Versions

Version/Model S/N OpenWrt Version Supported Model Specific Notes
A1 - yes same HW as FRYS FR-54RTR, similar to DIR-615 E1-E4
B1 & B2 for B2, see DIR-300(B1)/DIR-600(B1&B2) other hardware same HW as DIR-300(B1)/DIR-600(B1&B2)

Hardware Highlights

CPU Ram Flash Network USB Serial JTAG
AR7240 32MB 4MB 4 x 1 No Internal TTL solder pads No

DIR-601

The DIR-601 is basically a slightly newer DIR-600 with Atheros AR7240 SoC version 2, and a non-detachable antenna.

Supported Versions

Version/Model S/N OpenWrt Version Supported Model Specific Notes
A1 - Backfire 10.03.1 (confirmed by uvray313) JFFS2-Images does not appear to work
A1 - Attitude Adjustment 12.09b2 (confirmed by nop) no JFFS2-Images, possible better stability
B1 - r36786 Forum Thread

Hardware Highlights

CPU Ram Flash Network USB Serial JTAG
AR7240 32MB 4MB 4 x 1 mod Internal TTL solder pads No

Installation

See this link for up-to-date information on browsers and flashing this router.

https://forum.openwrt.org/viewtopic.php?id=44107

Installing of OpenWrt for first time

Download http://downloads.openwrt.org/backfire/10.03.1/ar71xx/openwrt-ar71xx-dir-600-a1-squashfs-factory.bin

or http://downloads.openwrt.org/attitude_adjustment/12.09-beta2/ar71xx/generic/openwrt-ar71xx-generic-dir-601-a1-squashfs-factory.bin

Some DIR-601 (Rev.A1) factory firmware revisions will accept a 10.03.x DIR-600 (Rev.A1) squashfs-factory.bin if the final byte is changed from ASCII "0" to "2". 12.09beta and later provide separate images for the DIR-601 (Rev.A1).

Flash via D-Link Web Interface

These D-Link routers have a special (and very nice) web interface specifically for flashing firmware. This is the simplest way to upgrade this router to OpenWRT. It also provides a fail-safe method of reflashing the firmware in case you "brick" your router and can no longer access it using other methods.

- Manually set your PC's IP address to any address between 192.168.0.2 and 192.168.0.253.

Don't use 192.168.0.1 (The router IP address will default to 192.168.0.1 when reset as instructed below.)

- Hold the reset button while powering up the router and continue to hold until the power light begins blinking. Repeat if necessary.

- Open Internet Explorer 6, and go to http://192.168.0.1.

Most other web browser such as Firefox and even later versions of Internet Explorer, will appear to work but may not successfully upload the firmware to the router.

- Upload the .bin file you downloaded above.

The progress will get to a random percentage and then stop while the router reboots. This is OK. The actual percentage does not actually mean anything useful.

- Wait for the router to boot back up.

The router signifies restarting by quickly flashing all lights. You'll know when the router has fully booted when the 'Status' light turns from orange to green. The LAN and WAN link lights will not light up, but the router is functioning.

- Set your computer's network interface back to automatic or manually to any IP address between 192.168.1.2 and 192.168.1.253.

Don't use 192.168.1.1 as this is the new IP address of the router now that the OpenWRT firmware has been successfully installed.

- Telnet to 192.168.1.1 and you should be presented with a shell prompt.

If you set the password via Telnet, you will need to use a SSH connection using a program like "Putty" to log in afterwards. Alternatively, you can set your password via the web interface.

- Access the web interface using a web browser and go to http://192.168.1.1

You will be presented with a login page.

If you cannot access the router via Telnet or the web interface , check to ensure that you have properly reconfigured your computer's network interface and that it has a correct IP address. If all else fails, repeat these instructions as the router's firmware has not been successfually flashed with OpenWRT.

Flash via Normal Web Interface

The normal web interface accepts the ddwrt image linked in their wiki, but not the openwrt images. Attempting to flash openwrt from ddwrt can damage the u-boot and wireless partitions, resulting in no wireless or a brick. BACK UP EVERYTHING!

Flash via U-Boot console

Loading an image via tftp may not work, arp replies do not seem to make it though the switch, these commands use y-modem instead.


ar7240> loady 0x81000000
## Ready for binary (ymodem) download to 0x81000000 at 115200 bps...
CCCCC
*** file: /tftp_root/openwrt.bin
sb -vv /tftp_root/openwrt.bin 
Sending: openwrt.bin
Bytes Sent:3735680   BPS:9438                            
Sending: 
Ymodem sectors/kbytes sent:   0/ 0k
Transfer complete

*** exit status: 0
## Total Size      = 0x00390018 = 3735576 Bytes
ar7240> protect off 0xbf040000 +0x00390017
ar7240> erase 0xbf040000 +0x00390017
ar7240> cp.b 0x81000000 0xbf040000 0x00390018
ar7240> bootm 0xbf040000
## Booting image at bf040000 ...
   Image Name:   MIPS OpenWrt Linux-2.6.32.27
   Created:      2011-12-21   1:03:18 UTC
   Image Type:   MIPS Linux Kernel Image (lzma  compressed)
   Data Size:    894180 Bytes = 873.2 kB
   Load Address: 80060000
   Entry Point:  80060000
   Verifying Checksum ... OK
   LZMA Umcompressing Kernel Image ...    Image loaded from 80060000-803039c0
 OK
No initrd
## Transferring control to Linux (at address 80060000) ...
## Giving linux memsize in bytes, 33554432

Starting kernel ...
.....
.....

Upgrading OpenWrt

Hardware

Info

Architecture: MIPS
Vendor: Atheros
Bootloader: U-Boot
System-On-Chip: AR7240
CPU Speed: 350MHz
Flash-Chip: Winbond W25X32VF1G SPI flash
Flash size: 4MiB
RAM: 32MiB
Wireless: Atheros AR9285
Ethernet: eth0, eth1 (confirmed on 601 only)
Switch: AR7240 built-in 6 port switch (cpu @ port 0), 16 vlans (confirmed on 601 only)
USB: mod (601)
Serial: Yes
JTAG: No

The swconfig command provides the following info about the Dir-601 ethernet switch.

root@OpenWrt:/# swconfig dev eth0 show
Global attributes:
        enable_vlan: 1
Port 0:
        pvid: 1
Port 1:
        pvid: 1
Port 2:
        pvid: 1
Port 3:
        pvid: 1
Port 4:
        pvid: 1
Port 5:
        pvid: 0
VLAN 0:
        vid: 0
        ports: 5
VLAN 1:
        vid: 1
        ports: 0 1 2 3 4
The information written on the main Atheros chip is as follows:
AR7240-AH1A
F48053, 1C
1005
TAIWAN
FIXME Link to datasheet

The information written on the WiFi Atheros chip is as follows:

AR9285-AL1A
D02868B
1005
TAIWAN
FIXME Link to datasheet

The information written on the PSC DDR-Ram chip ar as as follows:

A3S56D40ETP
A10ANL25
TAIWAN -G5
FIXME Link to PSC datasheet Link to non-manufacturer datasheet (should be similar): here

The information on the W25X32VF1G Winbond Flash chip are as follows:

25X32VF1G
1007
Datasheet: http://www.alldatasheet.com/view.jsp?Searchword=W25X32

Alternate Flash: MX25L3206E in SOP8 package (hidden under SOP16 in pics) http://www.zlgmcu.com/mxic/pdf/NOR_Flash_c/MX25L3206E_DS_EN.pdf

Photos

DIR-601 A1 Top PCB

DIR-601 A1 Top PCB

DIR-601 A1 Bottom PCB and Case

DIR-601 A1 Bottom PCB and Case

Serial

Serial header pinout:

           _______
          |
          | S        JP3 pinout:
___       | h          1: VCC (3.3V) (square)
   |  o 1 | i          2: Rx
 S |  o 2 | e          3: Tx
 h |  o 3 | l          4: GND
 i |  o 4 | d
 e |  JP3 |
 l |      |_______
 d |
___|

   DS4
   LED2  DS5
___|*|__|*|____________ 

This setup:

http://images.kaneva.com/filestore9/4609772/6089590/UARTUJumperUWires_ad.JPG

works great for me. Just remember that you can't hook up a PC serial port directly. You need a TTL to RS232 level converter. Note that the linked image above has the ports facing you, and LEDs facing away. This is opposed to the above images of the DIR-601 with ports facing away. Take note of the position of the square solder pad in relation to the others when soldering.

You can also have a look at the picture in the USB mod section where these pins are labeled on the left-hand side.

JTAG

(generic JTAG boilerplate)

How to connect to JTAG interface, and how to reflash the device with JTAG tools

See port.jtag for more JTAG details.

The DIR-601 does not appear to have a JTAG interface. (I am not sure about the DIR-600).

USB Mod

Information on how to add USB hardware and support to the AR72xx processor.

Hardware

Hardware portion of the mod involving soldering and adding a few passive components.

Caution

USB is possible on the DIR-601 (and likely DIR-600) and I (amishx64) have it working. I still need to sort out some kinks before posting more details and pictures, but they will be posted soon.

:!: Note: This section is still being written.

:!: This USB port mod is very hard to do even with very good tools due to the tiny pin spacing on the Atheros AR72xx processor.

Warning: You will run the risk of ruining the device if you attempt this mod. You have been warned.
Resources

This mod was completed with two main resources: the USB Host section of the TP-Link TL-WR741ND page at http://wiki.openwrt.org/toh/tp-link/tl-wr741nd?s[]=build#usb.host and part 1 of the D-Link DIR-615 rev E1-E4 USB port mod http://wiki.openwrt.org/toh/d-link/dir-615/ex-usb.

Connections

Solder two wires onto pins 73 and 74 on the Atheros SOC. The pins can be counted starting from the upper left corner of the chip with the dot (pin 1) and counterclockwise along the sides. Since the SOC has 128 pins, there are 32 pins per side. Pins 73 and 74 should be on the right side of the chip if you are facing the chip right side up. Alternatively, the two pins are 9 and 10 when counting from the bottom of the right side of the chip. The two pins should not have any PCB traces leading to them. Pin 73/9 is D- and pin 74/10 is D+. I recommend using wire wrap to solder to the pins since it is very thin. Tin the wire wrap with a minimal amount of solder, hold it on top of a pin with tweezers and apply heat to a part of the wire not touching the pin itself with a solder-free tip. Do not touch the tip of the soldering iron directly to the pins like I did. You will likely bridge some pins, rendering the device useless unless cleaned (very hard to do, but possible and very time consuming). Use ample flux. Once both wires have been soldered, apply hot glue to the board and wires (not the chip!) to ensure they don't break off. If you don't glue them down, they will break off and will likely short out other pins.

Once you have soldered the two wires on and checked your work, use a 15K Ohm resistor to pull the lines low. (In my picture, I use 10K Ohm and 5.1K Ohm resistors = 15.1K Ohm since that is what I had on-hand.) To clarify, pulling the D+ and D- lines low means that you need to hook one end of the resistor to GND and the other end to one of the lines. Do this for each line. A 330 ohm resisror is not needed as specified in the USB host standard, so I suspect that the 330 ohm resistors are internal.

Next connect the two lines to a female type A USB plug. +5V (red) can be sourced from the router's 5V connector and GND (black) can be connected at any unoccupied GND pad on the board. D- is likely to be white and D+ green on the USB female plug. Alternatively, from the front of a female type A USB connector, pin 1 is VCC (+5V), pin 2 is D- (white, 73/9), pin 3 is D+ (green, 74/10), and pin 4 is GND (black). Source: http://pinouts.ru/Slots/USB_pinout.shtml

Thermal Caution: Some of these new packages can be rather processor-intensive. Without additional cooling the CPU stops functioning! I find active cooling with heatsink and a small fan are required.

Software

Check → usb.essentials and → usb.storage or simply build your own firmware with everything already integrated:

Kernel Modifications

The only file that needs to be modified is target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c as part 1 of http://wiki.openwrt.org/toh/d-link/dir-615/ex-usb.

I have tried this on Backfire 10.03.1-rc4 and confirmed it working. This should also apply to any other Backfire builds as well as trunk but has not been tested by me yet.

  1. Download SVN source code
  2. Backup by copying target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c to a completely different location (in case something goes wrong)
  3. Edit file target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c
    • Add line #include "dev-usb.h" after line #include "dev-leds-gpio.h"
    • Add line ar71xx_add_device_usb(); after line ar71xx_add_device_eth(0);
    • Note: order of lines pasted does not necessarily matter as long as they are in their corresponding sections or methods
  4. Run 'make menuconfig' and select platform/profile (atheros ar71xx/Dir-600-a1) and other packages discussed in the next section
  5. Compile the image and flash it to the router
Packages

Packages that I have enabled are listed below. They support Ext4 formated USB drives. I am currently having problems with FAT and large (2GB+ drives). Not all packages listed are necessary (few are). Just use this for a guide to get things up an running.

Base system

block-extroot block-hotplugfdisk fat_filesystem Ext_filesystem linux_swap_filesystem (prob not needed) mount umount block-mount

Base System -> busybox -> Configuration -> Linux System Utilities

fdisk fat_filesystem Ext_filesystem linux_swap_filesystem (prob not needed) mount umount

Libraries

libusb

Kernel Modules -> Block Devices

kmod-scsi-core

Kernel Modules -> Filesystems

kmod-fs-autofs4 kmod-fs-ext4 kmod-fs-msdos kmod-fs-vfat

USB Support

kmod-usb-core kmod-usb-ohci kmod-usb-storage kmod-usb-usb2

Utilities

mount-utils

:!: Warning: enabling mountd may cause high CPU load without a patch

Basic configuration

Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

Specific Configuration

Interfaces

The default (OpenWRT) network configuration is:

Interface Name Description Default configuration
br-lan LAN & WiFi 192.168.1.1/24
eth0 LAN None
eth1 WAN None
lan1 LAN None
lan2 LAN None
lan3 LAN None
lan4 LAN None

Flash Layout

You could prettify this flash.layout. — orca 2011/05/16 13:03

MTD memory partitions for DIR-601:

Address Start Address End Name
0x000000000000 0x000000030000 u-boot
0x000000030000 0x000000040000 nvram
0x000000040000 0x000000120000 kernel
0x000000120000 0x0000003e0000 rootfs
0x00000025a000 0x0000003e0000 rootfs_data
0x0000003e0000 0x0000003f0000 mac
0x0000003f0000 0x000000040000 art
0x000000040000 0x0000003e0000 firmware

Controlling GPIOs

Controlling LEDs

The ability to control LEDs has been confirmed to work on the DIR-601. I have not tested the DIR-600. There are three predefined LEDs that can be controlled.

To turn on the green power led:

echo "1" >/sys/class/leds/dir-600-a1\:green\:power/brightness
To turn on the amber power led:
echo "1" >/sys/class/leds/dir-600-a1\:amber\:power/brightness
To turn on the blue wireless protected setup led (on the side of the router):
echo "1" >/sys/class/leds/dir-600-a1\:blue\:wps/brightness
To turn off the LEDs, you replace the "1" with a "0" in the above commands. I still don't know how to control the individual LAN/WAN LEDs. I also don't know what the trigger (does nothing), max_brightness (returns permission denied), and uevent functions do nor have I had time to look into them. Also, the brightness function used above doesn't seem to be able to vary the LED brightness (PWM), as different values than "0" or "1" have no noticeable effect. Software PWM is possible with the use of a timer but I don't see any developed software to implement it. Maybe someone could make a package that does this?

I (amishx64) will be working on mapping and expanding the functionality of the LEDs/GPIOs next after I finish up the USB mod section. After the GPIOs all work, I can look at adding SD can other bit-bang protocol support…

In order to add GPIOs/LEDs, the target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir600-a1.c file needs to be modified. Backup by copying target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir600-a1.c to a completely different location (in case something goes wrong).

The unmodified mach-dir600-a1.c file has two main sections that need to be added to in order to add LED 'devices' as GPIOs to the system.

Definitions

The first section that needs to be added to is the #define section, after the #include section. Since there are LEDs that need to be added, any additions should look similar to the provided code in the original file: #define DIR_600_A1_GPIO_LED_WPS 0 #define DIR_600_A1_GPIO_LED_POWER_AMBER 1 #define DIR_600_A1_GPIO_LED_POWER_GREEN 6

Here is a table of the LEDs on the DIR-601 and corresponding GPIOs:

Power Globe WiFi LAN 1 LAN 2 LAN 3 LAN 4 WPS
Amber GPIO 1 GPIO 7 ——- ——- ——- ——- ——- ——
Green GPIO 6 GPIO 17 GPIO ?? GPIO 13 GPIO 14 GPIO 15 GPIO 16 ——
Blue —— ——- ——- ——- ——- ——- ——- GPIO 0

Of those, the WPS LED all LAN LEDs GPIOs are active low. If you don't define them as active low in the next section they will behave as if the signal is inverted.

The new definitions that need to be added are as follows:

#define DIR_600_A1_GPIO_LED_GLOBE_AMBER 7 #define DIR_600_A1_GPIO_LED_LAN1_GREEN 13 #define DIR_600_A1_GPIO_LED_LAN2_GREEN 14 #define DIR_600_A1_GPIO_LED_LAN3_GREEN 15 #define DIR_600_A1_GPIO_LED_LAN4_GREEN 16 #define DIR_600_A1_GPIO_LED_GLOBE_GREEN 17

Array Structure

The defined LED GPIOs then need to be implemented in in a structure to be included in the kernel as devices.

Add the following lines to the static struct gpio_led dir_600_a1_leds_gpio[] __initdata array section of code:

:!: You must not miss commas or any other syntax (missing a space is fine) otherwise you will break the build.

, { .name = "dir-600-a1:amber:globe", .gpio = DIR_600_A1_GPIO_LED_GLOBE_AMBER, }, { .name = "dir-600-a1:green:LAN1", .gpio = DIR_600_A1_GPIO_LED_LAN1_GREEN, .active_low = 1, }, { .name = "dir-600-a1:green:LAN2", .gpio = DIR_600_A1_GPIO_LED_LAN2_GREEN, .active_low = 1, }, { .name = "dir-600-a1:green:LAN3", .gpio = DIR_600_A1_GPIO_LED_LAN3_GREEN, .active_low = 1, }, { .name = "dir-600-a1:green:LAN4", .gpio = DIR_600_A1_GPIO_LED_LAN4_GREEN, .active_low = 1, }, { .name = "dir-600-a1:green:globe", .gpio = DIR_600_A1_GPIO_LED_GLOBE_GREEN, .active_low = 1, }

Compile OpenWrt

And that should be it. Do a make clean and then make. If you get any error on compiling the edited file or on linux/install, when building, you messed something up above.

Just a note for anyone with a different router reading this: if you get a leds-gpio/: probe of leds-gpio failed with error -22" error that means that you tried to add a GPIO that either doesn't exist or can't be made a GPIO. Change the GPIO pin definition.

Further Work and Other Thoughts

Once I get the WiFi LED working I will submit a patch to the developers for future OpenWrt images. It seems as though the WiFi LED is not a standard GPIO pin. I am making this assumption for two reasons:

1) I can't get the LED to turn on even when I define every single GPIO possibility.

2) The LED does not turn on at router boot up like all the LEDs do.

I don't think it is worth my time to get one LED to work, especially since there are now so many others working. My best guess is that the LED is actually tied to the wireless chipset and blinks whenever there is traffic.

Also there is a empty spot on the PCB (DS2) where a LED could be present. It is likely this would be controlled via GPIO also, but the surrounding area is missing some passive components that may need to be put in. There is also a test point (TP29) near the CPU and a bit to the right of the serial header. This is likely a GPIO also.

I will also host the modified mach-dir600-a1.c file for anyone that wants it (eventually).

FIXME @jkiddo: - I recently ported the DIR-632-A1, and for this board the WLAN is not a normal GPIO, to get the WLAN LED to work you actually have to call

   ap9x_pci_setup_wmac_led_pin(0, DIR_632_A1_WLAN_GPIO_LED); 
where DIR_632_A1_WLAN_GPIO_LED is 0 in this case, I have seen it as 1 in other boards. I suspect you need to do something similar here…

Failsafe mode

generic.failsafe

If you forgot your password, broke one of the startup scripts, firewalled yourself out, or corrupted the JFFS2 partition, you can get back in by using OpenWrt's failsafe mode or simply reflashing the firmware as instructed above.

Boot into failsafe mode

  • Unplug the router's power cord.
  • Connect the router's LAN1 port directly to your PC.
  • Configure your PC with a static IP address between 192.168.1.2 and 192.168.1.254. Eg. 192.168.1.2 (gateway and DNS is not required).
  • Plug the power on and wait for the DMZ LED to light up.
  • While the DMZ LED is on immediately press any button (Reset and Secure Easy Setup will work) a few times .
  • If done right the DMZ LED will quickly flash 3 times every second.
  • You should be able to telnet to the router at 192.168.1.1 now (no username and password)

What to do in failsafe mode?

NOTE: The root file system in failsafe mode is the SquashFS partition mounted in readonly mode. To switch to the normal writable root file system run mount_root and make any changes. Run mount_root now.

  1. Forgot/lost your password and you like to set a new one

passwd

  1. Forgot the routers IP address

uci get network.lan.ipaddr

  1. You accidentally run 'ipkg upgrade' or filled up the flash by installing large packages (clean the JFFS2 partition and start over)

mtd -r erase rootfs_data If you are done with failsafe mode power cycle the router and boot in normal mode.

Other Info

Stock Bootlog

U-Boot 1.1.4 (Apr 23 2009 - 11:58:47)

AP91 (ar7240) U-boot
DRAM:
sri
#### TAP VALUE 1 = 8, 2 = 9
32 MB
Top of RAM usable for U-Boot at: 82000000
Reserving 243k for U-Boot at: 81fc0000
Reserving 192k for malloc() at: 81f90000
Reserving 44 Bytes for Board Info at: 81f8ffd4
Reserving 36 Bytes for Global Data at: 81f8ffb0
Reserving 128k for boot params() at: 81f6ffb0
Stack Pointer at: 81f6ff98
Now running in RAM - U-Boot at: 81fc0000
id read 0x100000ff
flash size 4194304, sector count = 64
Flash:  4 MB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   ag7240_enet_initialize...
Fetching MAC Address from 0x81fe6e50
: cfg1 0xf cfg2 0x7014
eth0: 00:03:7f:e0:04:33
eth0 up
No valid address in Flash. Using fixed address
: cfg1 0xf cfg2 0x7214
eth1: 00:03:7f:09:0b:ad
ATHRS26: resetting s26
ATHRS26: s26 reset done
eth1 up
eth0, eth1
Hit any key to stop autoboot:  0
## Booting image at bf040000 ...
   Image Name:   Linux Kernel Image
   Created:      2010-01-29   6:12:45 UTC
   Image Type:   MIPS Linux Kernel Image (lzma  compressed)
   Data Size:    980953 Bytes = 958 kB
   Load Address: 80002000
   Entry Point:  802b0000
   Verifying Checksum ... OK
   LZMA Umcompressing Kernel Image ...    Image loaded from 80002000-802d8086
 OK
No initrd
## Transferring control to Linux (at address 802b0000) ...
## Giving linux memsize in bytes, 33554432

Starting kernel ...

Booting AR7240(Python)...
Linux version 2.6.15--LSDK-7.3.0.260 (root@debian) (gcc version 3.4.4) #1 Fri Jan 29 01:08:23 EST 2010
flash_size passed from bootloader = 4
arg 1: console=ttyS0,115200
arg 2: root=31:03
arg 3: rootfstype=squashfs,jffs2
arg 4: init=/sbin/init
arg 5: mtdparts=ar7240-nor0:192k(u-boot),64k(nvram),960k(linux),2752k(rootfs),64k(MAC),64k(ART)
arg 6: mem=32M
CPU revision is: 00019374
Determined physical RAM map:
 memory: 02000000 @ 00000000 (usable)
User-defined physical RAM map:
 memory: 02000000 @ 00000000 (usable)
Built 1 zonelists
Kernel command line: console=ttyS0,115200 root=31:03 rootfstype=squashfs,jffs2 init=/sbin/init mtdparts=ar7240-nor0:192k(u-boot),64k(nvram),960k(linux),2752k(rootfs),64k(MAC),64k(ART) mem=32M
Primary instruction cache 64kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (20 instructions).
Synthesized TLB load handler fastpath (32 instructions).
Synthesized TLB store handler fastpath (32 instructions).
Synthesized TLB modify handler fastpath (31 instructions).
Cache parity protection disabled
PID hash table entries: 256 (order: 8, 4096 bytes)
Using 175.000 MHz high precision timer.
Console: colour dummy device 80x25
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 29104k/32768k available (2285k kernel code, 3648k reserved, 454k data, 164k init, 0k highmem)
Mount-cache hash table entries: 512
Checking for 'wait' instruction...  available.
NET: Registered protocol family 16
SCSI subsystem initialized
Returning IRQ 48
TC classifier action (bugs to netdev@vger.kernel.org cc hadi@cyberus.ca)
AR7240 GPIOC major 0
squashfs: version 3.1 (2006/08/19) Phillip Lougher
Initializing Cryptographic API
io scheduler noop registered
io scheduler deadline registered
HDLC line discipline: version $Revision: 1.1.1.1 $, maxframe=4096
N_HDLC line discipline registered.
Software Watchdog Timer: 0.07 initialized. soft_noboot=0 soft_margin=60 sec (nowayout= 0)
Serial: 8250/16550 driver $Revision: 1.1.1.1 $ 1 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0x0 (irq = 19) is a 16550A
RAMDISK driver initialized: 1 RAM disks of 8192K size 1024 blocksize
loop: loaded (max 8 devices)
PPP generic driver version 2.4.2
PPP Deflate Compression module registered
PPP BSD Compression module registered
PPP MPPE Compression module registered
NET: Registered protocol family 24
PPTP driver version 0.7.12
6 cmdlinepart partitions found on MTD device ar7240-nor0
Creating 6 MTD partitions on "ar7240-nor0":
0x00000000-0x00030000 : "u-boot"
0x00030000-0x00040000 : "nvram"
0x00040000-0x00130000 : "linux"
0x00130000-0x003e0000 : "rootfs"
0x003e0000-0x003f0000 : "MAC"
0x003f0000-0x00400000 : "ART"
GACT probability on
Mirror/redirect action on
Simple TC action Loaded
netem: version 1.1
u32 classifier
    Perfomance counters on
    input device check on
    Actions configured
Netfilter messages via NETLINK v0.30.
NET: Registered protocol family 2
IP route cache hash table entries: 512 (order: -1, 2048 bytes)
TCP established hash table entries: 2048 (order: 1, 8192 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
ip_conntrack version 2.4 (256 buckets, 2048 max) - 232 bytes per conntrack
ip_ct_h323: init success
ip_conntrack_rtsp v0.6.21 loading
ip_nat_rtsp v0.6.21 loading
ip_conntrack_pptp version 3.1 loaded
ip_nat_pptp version 3.0 loaded
ip_tables: (C) 2000-2002 Netfilter core team
ipt_time loading
ipt_recent v0.3.1: Stephen Frost <sfrost@snowman.net>.  http://snowman.net/projects/ipt_recent/
ClusterIP Version 0.8 loaded successfully
TCP bic registered
NET: Registered protocol family 1
NET: Registered protocol family 10
lo: Disabled Privacy Extensions
IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
arch/mips/ar7240/gpio.c (ar7240_simple_config_init) JUMPSTART_GPIO: 12

ar7240: calling simple_config callback..
ar7240wdt_init: Registering WDT VFS: Mounted root (squashfs filesystem) readonly.
Freeing unused kernel memory: 164k freed
init started:  BusyBox v1.01 (2010.01.29-06:12+0000) multi-call binary
Algorithmics/MIPS FPU Emulator v1.5

Please press Enter to activate this console. ag7240_mod: module license 'unspecified' taints kernel.
AG7240: Length per segment 1536
AG7240: Max segments per packet 1
AG7240: Max tx descriptor count    80
AG7240: Max rx descriptor count    252
AG7240: fifo cfg 3 01f00140
AG7240CHH: Mac address for unit 0
AG7240CHH: 00:03:7f:e0:04:33
AG7240CHH: Mac address for unit 1
AG7240CHH: ff:ff:ff:ff:ff:ff
in get_default_mac!!!
ag7240_ring_alloc Allocated 1280 at 0x803c8000
ag7240_ring_alloc Allocated 4032 at 0x813b8000
Setting PHY...
ADDRCONF(NETDEV_UP): eth0: link is not ready
eth0: Cannot assign requested address
ag7240_ring_alloc Allocated 1280 at 0x813d4800
ag7240_ring_alloc Allocated 4032 at 0x813df000
Call athrs26_reg_init_lan
ATHRS26: resetting s26
ATHRS26: s26 reset done
Setting PHY...
ADDRCONF(NETDEV_UP): eth1: link is not ready
eth1: Cannot assign requested address
device eth1 entered promiscuous mode
AG7240: enet unit:1 phy:0 is up...Mii 100Mbps full duplex
AG7240: done cfg2 0x7205 ifctl 0x0 miictrl
AG7240: enet unit 1 phy 0 mode 0x4c04
ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
br0: port 1(eth1) entering learning state
br0: topology change detected, propagating
br0: port 1(eth1) entering forwarding state
Fri Jan 29 01:11:00 UTC 2010
Entry gpio_ioctl init_module !!
sh: cannot create /proc/sys/net/ipv6/conf/eth0/accept_ra: Directory nonexistent
lan mac = 00:01:23:11:11:11rc is BUSY now!
eth0: Cannot assign requested address
sh: cannot create /proc/sys/net/ipv6/conf/eth0/accept_ra: Directory nonexistent
eth1: Cannot assign requested address
dhcpd_enabled::::::
domain empty
Failure parsing line 19 of /var/etc/udhcpd.conf
Failure parsing line 20 of /var/etc/udhcpd.conf
Failure parsing line 21 of /var/etc/udhcpd.conf
DHCP server start.
device_lan_ip=192.168.0.1 , device_lan_subnet_mask=255.255.255.0
=======================
=== insmod_wlan_mod ===
=======================
DHCP client start.
max_leases value (254) not sane, setting to 100 instead
Unable to open /var/misc/udhcpd.leases for reading
ath_hal: 0.9.17.1 (AR5416, DEBUG, REGOPS_FUNC, WRITE_EEPROM, 11D)
eth0      Link encap:Ethernet  HWaddr 1C:AF:F7:CC:9F:BC
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

wlan: 0.8.4.2 (Atheros/multi-bss)
ath_rate_atheros: Copyright (c) 2001-2005 Atheros Communications, Inc, All Rights Reserved
ath_dev: Copyright (c) 2001-2007 Atheros Communications, Inc, All Rights Reserved
ath_pci: 0.9.4.5 (Atheros/multi-bss)
wifi0: Atheros 9285: mem=0x10000000, irq=48 hw_base=0xb0000000
wlan: mac acl policy registered
wlan_me: Version 0.1
Copyright (c) 2008 Atheros Communications, Inc. All Rights Reserved
Sending discover...
ath0
device br0 already exists; can't create bridge with the same name
device eth1 left promiscuous mode
br0: port 1(eth1) entering disabled state
device ath0 entered promiscuous mode
device eth1 entered promiscuous mode
br0: port 2(eth1) entering learning state
br0: topology change detected, propagating
br0: port 2(eth1) entering forwarding state
Country ie is USI

/************** debug wlan setting ****************/
/* WlanMode: Set to default mode (AP)
/* 80211Mode: 11NGHT20
/* ChannelWidth: 20
/* Essid: dlink
/* Channel: 6
/* WEP: close
/* WPA: close (non security)
/* WPS: Non-Sec-Enable
/* WPS AP-DEFAULT-PIN: 34102350
/* WPS AP-PIN: 34102350
/**************************************************/

########################
### turn wps-led off ###
########################

Sending discover...
Reading topology file /tmp/tmp/topology.conf ...
Reading bss configuration file /tmp/tmp/secath0.conf ...

br0: port 1(ath0) entering disabled state
Defaulted uuid based on mac addr 1c:af:f7:cc:9f:bb
Could not connect to kernel driver.
Using interface ath0 with hwaddr 1c:af:f7:cc:9f:bb and ssid 'dlink'
Country ie is USI
br0: port 1(ath0) entering learning state
br0: topology change detected, propagating
br0: port 1(ath0) entering forwarding state
upnp_wps_device_init called
l2_packet_receive - recvfrom: Network is down
br0: File exists
TFTP main
standard_tftp_server launched on port 69.
Fri Jan 29 01:11:00 UTC 2010
DHCPC Received SIGUSR2=>DHCPC Release
Performing a DHCPC release
Performing a DHCPC release
Entering released state
wantimer: dhcpc_release (VCT_DISCONNECT)
wan_ipaddr == NULL, enable mac_filter/ upnp only
Start Firewall: Clear iptables
killall: crowdcontrol: no process killed
killall: wakeOnLanProxy: no process killed
rc is IDLE now!
write_radvd_conf_cmd start
write radvd_conf_cmd finished

Tags

Back to top

toh/d-link/dir-600.txt · Last modified: 2014/01/09 15:03 by cptdondo