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toh:tp-link:tl-mr3420 [2013/10/17 00:27]
p4trykx added MR3420 V2.2 serial info
toh:tp-link:tl-mr3420 [2014/04/09 10:58] (current)
timomwa
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===== Supported Versions ===== ===== Supported Versions =====
^ Model Version ^ FCC ID ^ OpenWrt Version Supported ^ Model Specific Notes ^ ^ Model Version ^ FCC ID ^ OpenWrt Version Supported ^ Model Specific Notes ^
-| MR3220 v1 | [[https://fjallfoss.fcc.gov/oetcf/eas/reports/ViewExhibitReport.cfm?mode=Exhibits&RequestTimeout=500&calledFromFrame=N&application_id=580861&fcc_id=%27TE7MR3220%27|TE7MR3220]] | {{:meta:icons:tango:software-update-available.png?nolink&24 |Known Bugs }} AA 12.09b ([[https://dev.openwrt.org/changeset/24439|r24439]]) | - | +| MR3220 v1 | [[https://fjallfoss.fcc.gov/oetcf/eas/reports/ViewExhibitReport.cfm?mode=Exhibits&RequestTimeout=500&calledFromFrame=N&application_id=580861&fcc_id=%27TE7MR3220%27|TE7MR3220]] | Attitude Adjustment ([[https://dev.openwrt.org/changeset/24439|r24439]]) | - | 
-| MR3220 v1.2 |  | {{:meta:icons:tango:software-update-available.png?nolink&24 |Known Bugs }} AA 12.09b ([[https://dev.openwrt.org/changeset/27340|r27340]]) | [[https://forum.openwrt.org/viewtopic.php?id=30863| Success ]] [[https://forum.openwrt.org/viewtopic.php?id=34156| Success]] [[es/doc/howto/3g.mr3220|Spanish 3G]] |+| MR3220 v1.2 |  | Attitude Adjustment ([[https://dev.openwrt.org/changeset/27340|r27340]]) | [[https://forum.openwrt.org/viewtopic.php?id=30863| Success ]] [[https://forum.openwrt.org/viewtopic.php?id=34156| Success]] [[es/doc/howto/3g.mr3220|Spanish 3G]] |
| MR3220 v2 | Aug-2012 | WiP | [[toh:tp-link:tl-ap121|TL-AP121]] [[https://forum.openwrt.org/viewtopic.php?pid=175777|Success]] | | MR3220 v2 | Aug-2012 | WiP | [[toh:tp-link:tl-ap121|TL-AP121]] [[https://forum.openwrt.org/viewtopic.php?pid=175777|Success]] |
| MR3220 v2.1 | [[https://apps.fcc.gov/oetcf/eas/reports/ViewExhibitReport.cfm?mode=Exhibits&RequestTimeout=500&calledFromFrame=N&application_id=206193&fcc_id=%27TE7MR3220V2%27 | TE7MR3220V2 ]] | Trunk | [[ https://forum.openwrt.org/viewtopic.php?id=44471 | Success ]] | | MR3220 v2.1 | [[https://apps.fcc.gov/oetcf/eas/reports/ViewExhibitReport.cfm?mode=Exhibits&RequestTimeout=500&calledFromFrame=N&application_id=206193&fcc_id=%27TE7MR3220V2%27 | TE7MR3220V2 ]] | Trunk | [[ https://forum.openwrt.org/viewtopic.php?id=44471 | Success ]] |
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| MR3420 v2 | Aug-2012 | Unsupported | [[toh:tp-link:tl-ap121|TL-AP121]] | | MR3420 v2 | Aug-2012 | Unsupported | [[toh:tp-link:tl-ap121|TL-AP121]] |
| MR3420 v2.1 | Dec-2012 | trunk | **Don't works USB port and USB indicator** | | MR3420 v2.1 | Dec-2012 | trunk | **Don't works USB port and USB indicator** |
 +| MR3420 v2.2 | Mar-2014 | trunk | Success |
 +| MR3420 v2.3 | Mar-2014 | trunk | Success (Did not test USB port) |
| WR841ND v7.1 | - | {{:meta:icons:tango:software-update-available.png?nolink&24 |Known Bugs }} AA 12.09b ([[https://dev.openwrt.org/changeset/23134|r23134]]) | [[toh:tp-link:tl-wr841nd|TL-WR841ND]] | | WR841ND v7.1 | - | {{:meta:icons:tango:software-update-available.png?nolink&24 |Known Bugs }} AA 12.09b ([[https://dev.openwrt.org/changeset/23134|r23134]]) | [[toh:tp-link:tl-wr841nd|TL-WR841ND]] |
| WR841ND v7.2 | - | {{:meta:icons:tango:software-update-available.png?nolink&24 |Known Bugs }} AA 12.09b ([[https://dev.openwrt.org/changeset/30310|r30310]]) | - | | WR841ND v7.2 | - | {{:meta:icons:tango:software-update-available.png?nolink&24 |Known Bugs }} AA 12.09b ([[https://dev.openwrt.org/changeset/30310|r30310]]) | - |
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http://ecco.selfip.net/backfire/ar71xx/openwrt-ar71xx-tl-mr3420-v1-squashfs-factory.bin|r31348 http://ecco.selfip.net/backfire/ar71xx/openwrt-ar71xx-tl-mr3420-v1-squashfs-factory.bin|r31348
]] | ]] |
 +^ MR3420 V2 || [[
 +http://downloads.openwrt.org/snapshots/trunk/ar71xx/openwrt-ar71xx-generic-tl-mr3420-v2-squashfs-factory.bin
 +|trunk]] | | | | |
^ MR3220 || [[ ^ MR3220 || [[
http://downloads.openwrt.org/snapshots/trunk/ar71xx/openwrt-ar71xx-generic-tl-mr3220-v1-squashfs-factory.bin http://downloads.openwrt.org/snapshots/trunk/ar71xx/openwrt-ar71xx-generic-tl-mr3220-v1-squashfs-factory.bin
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http://ecco.selfip.net/backfire/ar71xx/openwrt-ar71xx-tl-mr3420-v1-squashfs-sysupgrade.bin|r31348 http://ecco.selfip.net/backfire/ar71xx/openwrt-ar71xx-tl-mr3420-v1-squashfs-sysupgrade.bin|r31348
]] | ]] |
 +^ MR3420 V2 || [[
 +http://downloads.openwrt.org/snapshots/trunk/ar71xx/openwrt-ar71xx-generic-tl-mr3420-v2-squashfs-sysupgrade.bin
 +|trunk]] | | | | |
^ MR3220 || [[ ^ MR3220 || [[
http://downloads.openwrt.org/snapshots/trunk/ar71xx/openwrt-ar71xx-generic-tl-mr3220-v1-squashfs-sysupgrade.bin http://downloads.openwrt.org/snapshots/trunk/ar71xx/openwrt-ar71xx-generic-tl-mr3220-v1-squashfs-sysupgrade.bin
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==== Info ==== ==== Info ====
-^ Model ^ MR3420 ^^^ MR3220 ^^ +^ Model ^ MR3420 ^^^^ MR3220 ^^^ 
-^ Version ^ 1 ^ 1.1 ^ 1.2 ^ 1 ^ 1.2 ^ +^ Version ^ 1 ^ 1.1 ^ 1.2 ^ 2.3 ^ 1 ^ 1.2 ^ 2.2 ^ 
-| **Architecture:** |  MIPS 24Kc V7.4  ||||| +| **Architecture:** |  MIPS 24Kc V7.4  |||MIPS 74Kc|MIPS 24Kc V7.4||| 
-| **Manufacturer:** |  Atheros  ||||| +| **Manufacturer:** |  Atheros  ||||||| 
-| **Bootloader:** |  [[doc:techref:bootloader:uboot|U-Boot]]  ||||| +| **Bootloader:** |  [[doc:techref:bootloader:uboot|U-Boot]]  ||||||| 
-| **System-On-Chip:** |  Atheros AR7241@400MHz  ||||| +| **System-On-Chip:** |  Atheros AR7241@400MHz  |||Atheros AR9341@535MHz|Atheros AR7241@400MHz|| Atheros AR9331
-| **Flash chip:** |  [[http://www.zlgmcu.com/mxic/pdf/NOR_Flash_c/MX25L3206E_DS_EN.pdf|MACRONIX MX25L3206E]]  |  [[http://www.eonssi.com/upfile/p200951110712.pdf|cFeon F32-100HIP]]  |  [[http://www.winbond.com/NR/rdonlyres/B573ABE4-0DD6-4C10-AA9F-906945FC52B5/0/W25Q32BV.pdf|Winbond W25Q32BV]]  |    [[http://www.spansion.com/Support/Datasheets/S25FL032P_00.pdf|Spansion FL032PIF]]  |  [[http://www.eonssi.com/upfile/p200951110712.pdf|cFeon F32-100HIP]]  | +| **Flash chip:** |  [[http://www.zlgmcu.com/mxic/pdf/NOR_Flash_c/MX25L3206E_DS_EN.pdf|MACRONIX MX25L3206E]]  |  [[http://www.eonssi.com/upfile/p200951110712.pdf|cFeon F32-100HIP]]  |  [[http://www.winbond.com/NR/rdonlyres/B573ABE4-0DD6-4C10-AA9F-906945FC52B5/0/W25Q32BV.pdf|Winbond W25Q32BV]]  ||    [[http://www.spansion.com/Support/Datasheets/S25FL032P_00.pdf|Spansion FL032PIF]]  |  [[http://www.eonssi.com/upfile/p200951110712.pdf|cFeon F32-100HIP]]  | [[http://www.spansion.com/Support/Datasheets/S25FL032P_00.pdf|Spansion FL032PIF]]
-| **Flash size:** |    4 MiB    ||||| +| **Flash size:** |    4 MiB    ||||||| 
-| **RAM chip:** |  Zentel A3S56D40FTP -G5  |||  FIXME  | Zentel A3S56D40FTP -G5 | +| **RAM chip:** |  Zentel A3S56D40FTP -G5  |||Winbond W9425G6JH-5|  FIXME  | Zentel A3S56D40FTP -G5 |
-| **RAM size:** |  32 MiB  ||||| +| **RAM size:** |  32 MiB  ||||||| 
-| **Wireless** |  Atheros AR9287 (2x2 MIMO 300Mbps)  ||| Atheros AR9285 (1x1 MIMO 150Mbps) || +| **Wireless** |  Atheros AR9287 (2x2 MIMO 300Mbps)  |||Atheros AR9341| Atheros AR9285 (1x1 MIMO 150Mbps) || 
-| **Antenae(s)** |  2 Removables x 3 dBi  |||  1 Removable x 5 dBi  || +| **Antenae(s)** |  2 Removables x 3 dBi  ||||  1 Removable x 5 dBi  || 1 Removable
-| **Ethernet:** |  AG71xx 4 LAN, 1 WAN 100/10  ||||| +| **Ethernet:** |  AG71xx 4 LAN, 1 WAN 100/10  |||||| 
-| **USB:** |  1 x 2.0  ||||| +| **USB:** |  1 x 2.0  ||||||| 
-| **Serial:** |  [[#Serial|Unfriendly]]  ||||| +| **Serial:** |  [[#Serial|Unfriendly]]  |||||| 
-| **JTAG:** |  No  |||||+| **JTAG:** |  No  ||||||
==== Photos ==== ==== Photos ====
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| //Side view:// \\ {{http://www.tp-link.com/resources/images/products/Large/TL-MR3220_2.0-02.jpg?400}} | //Back:// \\ {{http://www.tp-link.com/resources/images/products/Large/TL-MR3220_2.0-04.jpg?400}} | | //Side view:// \\ {{http://www.tp-link.com/resources/images/products/Large/TL-MR3220_2.0-02.jpg?400}} | //Back:// \\ {{http://www.tp-link.com/resources/images/products/Large/TL-MR3220_2.0-04.jpg?400}} |
-| //Bottom:// \\ {{http://www.tp-link.com/resources/images/products/Large/TL-MR3220_2.0-05.jpg?400}} | //Board:// \\ {{https://dev.openwrt.org/raw-attachment/ticket/12026/MR3220V2_T.jpg?400}} \\ //More Photos:// [[http://dioptimizer.narod.ru/files/images/MR3220V2-005.jpg | 1]], [[http://dioptimizer.narod.ru/files/images/MR3220V2-006.jpg | 2]], [[http://dioptimizer.narod.ru/files/images/MR3220V2-007.jpg | 3]] | \\+| //Bottom:// \\ {{http://www.tp-link.com/resources/images/products/Large/TL-MR3220_2.0-05.jpg?400}} | //Board:// \\ {{https://dev.openwrt.org/raw-attachment/ticket/12026/MR3220V2_T.jpg?400}} \\ //More Photos:// [[http://dioptimizer.narod.ru/files/images/MR3220V2-005.jpg | 1]], [[http://dioptimizer.narod.ru/files/images/MR3220V2-006.jpg | 2]], [[http://dioptimizer.narod.ru/files/images/MR3220V2-007.jpg | 3]] | \\ 
 + 
 +===MR3420 v2.3=== 
 +//Board:// \\ 
 +{{:media:2014-03-05_tplink-mr3420-board.jpg?400 }} \\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
 +\\ 
==== Serial ==== ==== Serial ====
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^1 ^2 ^3 ^4| ^1 ^2 ^3 ^4|
|TX|RX|GND|VCC| |SJ1| |TX|RX|GND|VCC| |SJ1|
 +
 +Pinout for MR3220 **V2.2** (I have V2.3 as on photo with V2.2 on bottom) only
 +^1 ^2 ^3 ^4|
 +|**R**X|**T**X|GND|VCC| |JP1|
 +
{{http://img849.imageshack.us/img849/793/20111108140400.jpg?}}\\ {{http://img849.imageshack.us/img849/793/20111108140400.jpg?}}\\
Pin 1 is clearly marked on the board. Pin 1 is clearly marked on the board.
To be able to use the UART on MR3220V2, TP18 to TP38 and TP28 to TP48 should be connected. To be able to use the UART on MR3220V2, TP18 to TP38 and TP28 to TP48 should be connected.
 +
 +This is how I did mine;
 +{{https://lh6.googleusercontent.com/-wRJd08HDCYI/U0ULLA0qQdI/AAAAAAAAAiA/a5HxBscSLUY/w769-h577-no/jumpers_done.jpg}}\\
FIXME image lost: [[http://dioptimizer.narod.ru/files/images/MR3220V2-UART.png|MR3220V2-UART.png]]\\ FIXME image lost: [[http://dioptimizer.narod.ru/files/images/MR3220V2-UART.png|MR3220V2-UART.png]]\\
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{{https://farm3.staticflickr.com/2854/8894968126_4850f1500e_m.jpg}}\\ {{https://farm3.staticflickr.com/2854/8894968126_4850f1500e_m.jpg}}\\
 +
 +
To get the serial connection work reliably, you have to connect a 10k pullup resistor between the TX and the 3.3V pin. This is because the TX pin is connected to a voltage divider (2x5.6k) and a capacitor is put between the real pin and the TX connector. ((With MR3220 v1.2 and CA-42 just connect TX, RX and GND, do not need any resistor.)) To get the serial connection work reliably, you have to connect a 10k pullup resistor between the TX and the 3.3V pin. This is because the TX pin is connected to a voltage divider (2x5.6k) and a capacitor is put between the real pin and the TX connector. ((With MR3220 v1.2 and CA-42 just connect TX, RX and GND, do not need any resistor.))
-Now connect a [[http://buffalo.nas-central.org/index.php/Use_a_Nokia_Serial_Cable_on_an_ARM9_Linkstation#Preparing_the_Cable|serial hack adapter]] (DKU-5, CA-42 or similar containing the PL-2303 chip) and away you go!\\ +Now connect a [[http://buffalo.nas-central.org/index.php/Use_a_Nokia_Serial_Cable_on_an_ARM9_Linkstation#Preparing_the_Cable|serial hack adapter]] (DKU-5, CA-42 or similar containing the PL-2303 chip) and away you go!
-The right settings for accessing the serial console are as follows:+
[[http://i288.photobucket.com/albums/ll180/ninexunix/Max3232.png|This]] adapter can be also used provided a serial port is present on the PC. [[http://i288.photobucket.com/albums/ll180/ninexunix/Max3232.png|This]] adapter can be also used provided a serial port is present on the PC.
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When using it, router has to be powered on, and after that connect the pulldown, Tx and Rx pins. When using it, router has to be powered on, and after that connect the pulldown, Tx and Rx pins.
(Tx from schematic goes to Tx pin of router, Rx from schematic to Rx of router). (Tx from schematic goes to Tx pin of router, Rx from schematic to Rx of router).
 +
 +The right settings for accessing the serial console are as follows:
Bits per second: **115200**\\ Bits per second: **115200**\\
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Password to get **root** login is **5up** Password to get **root** login is **5up**
-**MR3420 v2.2** has all the signals routed to the pins soy you don't have to solder any additional wires. See here http://blog.technicentral.com/index.php/2-routers/1-mr3420-unbrick+**MR3420 v2.2** has all the signals routed to the pins so you don't have to solder any additional wires. See here http://blog.technicentral.com/index.php/2-routers/1-mr3420-unbrick
===== Basic configuration ===== ===== Basic configuration =====
Since this part is identical for all devices, see [[doc:howto:basic.config|Basic configuration]]. Since this part is identical for all devices, see [[doc:howto:basic.config|Basic configuration]].
-**Note:** (TP-Link MR4320 v1.2) In case the vlan switch configuration is not created automagically (<= 10.03.1) and there is eth0 and eth1 after bootup change /etc/config/network to reflect the vlan setup by adding the lines below. Also replace the 'option ifname "ethX"' accordingly (eth0.1, eth0.2). The proper ethernet port layout has still to be confimed.+**Note:** (TP-Link MR3420 v1.2) In case the vlan switch configuration is not created automagically (<= 10.03.1) and there is eth0 and eth1 after bootup change /etc/config/network to reflect the vlan setup by adding the lines below. Also replace the 'option ifname "ethX"' accordingly (eth0.1, eth0.2). The proper ethernet port layout has still to be confimed.
config switch eth0                  config switch eth0                 
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Use the QSS button instead of reset button, everything else is identical to [[doc:howto:generic.failsafe|generic failsafe]] document. Use the QSS button instead of reset button, everything else is identical to [[doc:howto:generic.failsafe|generic failsafe]] document.
 +
[[doc:howto:generic.failsafe|Failsafe]] may not work in Backfire before [[https://dev.openwrt.org/changeset/29661|r29661]], so it's confirmed to **not work** at Backfire 10.03.1 launch (r29592). Be extremely cautious on what you're doing or go directly to [[#serial|serial]] recovery. [[doc:howto:generic.failsafe|Failsafe]] may not work in Backfire before [[https://dev.openwrt.org/changeset/29661|r29661]], so it's confirmed to **not work** at Backfire 10.03.1 launch (r29592). Be extremely cautious on what you're doing or go directly to [[#serial|serial]] recovery.
Note for MR-3220 running on 12.09-rc1 (r34185): I did not get any UDP packets to port 4919 as promised either when connected to LAN or WAN, however repeatedly pushing the front button made the router to enter the failsafe mode, which allowed me to gain again access to the router. The problem almost bricking my router was in my network configuration, for some reason setting a fixed MAC address for a bridge caused the router to hang at /etc/init./network start. Note for MR-3220 running on 12.09-rc1 (r34185): I did not get any UDP packets to port 4919 as promised either when connected to LAN or WAN, however repeatedly pushing the front button made the router to enter the failsafe mode, which allowed me to gain again access to the router. The problem almost bricking my router was in my network configuration, for some reason setting a fixed MAC address for a bridge caused the router to hang at /etc/init./network start.
 +
 +
 +
 +==== IMPORTANT! ====
 +=== FAILED SETTING SOLUTION (NOT THE FAILED FLASH!): ===
 +In case of failure or an installation package settings can sometimes cause the router cannot be accessed either administrator page ([[http://192.168.1.1]]) also through the console. This condition can be addressed in the following way;
 +
 +1) turn off and turn on the Router
 +2) Shortly lights up press the SYS LED is that flashing LED SYS, will very quickly.
 +3) Now the Router has been accessible via TELNET
 +4 Router with TELNET) Login
 +5) type in the command: firstboot
 +6) type in the command:/etc/init.d/uhttpd start
 +7) went back to the Admin page in a browser with the address: [[http://192.168.1.1]]
 +
 +

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toh/tp-link/tl-mr3420.1381962450.txt.bz2 · Last modified: 2013/10/17 00:27 by p4trykx